Re: 2.6.30-rc4: microcode: failed to init CPU1

[Dmitry Adamushko]

>> [ ... ]
>> [ 6643.982900] microcode: failed to init CPU1
>> [ 6643.983528] CPU1 is up
>> [ 6643.984529] ACPI: Waking up from system sleep state S4
>> [ 6644.290917] pci 0000:00:1e.0: power state changed by ACPI to D0
>> [ 6644.291103] ata_piix 0000:00:1f.1: power state changed by ACPI to D0
>> [ 6644.291139] ata_piix 0000:00:1f.1: restoring config space at offset 0x1 (was 0x2800001, writing 0x2800005)
>> [ 6644.291187] ata_piix 0000:00:1f.2: restoring config space at offset 0x1 (was 0x2b00003, writing 0x2b00007)
>> [ 6644.297593] pci 0000:00:07.0: PME# disabled
>>
>> Is this an error/problem?
>
> Not sure.
>
> CCing the people who have worked with the Intel microcode code recently.


does the error message disappear with the following patch applied?

Thanks in advance.


---


Subject: error handling inconsistency

Don't report an error in case there is simply no cached microcode update available when resuming.


p.s. the current version in -tip provides better error handling and doesn't have this problem.


Signed-off-by: Dmitry Adamushko <dmitry.adamushko@xxxxxxxxx>


diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 98c470c..4fe8c3c 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -307,7 +307,7 @@ static int microcode_resume_cpu(int cpu)
 	pr_debug("microcode: CPU%d resumed\n", cpu);
 
 	if (!uci->mc)
-		return 1;
+		return 0;
 
 	/*
 	 * Let's verify that the 'cached' ucode does belong


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