Re: [PATCH 2/2] perf_counter: powerpc: Implement generalized cacheevents for POWER processors
From: Corey Ashford
Date: Fri Jun 12 2009 - 14:00:53 EST
Paul Mackerras wrote:
Ingo Molnar writes:
Yeah.
When thinking about having "composite" events, i.e. a counter whose
value is computed from two or more hardware counters, I couldn't see
how to do sampling in the general case. It's easy if we're just
adding multiple counters, but sampling when subtracting counters is
hard. For example, if you want to sample every N cache hits, and
you're computing hits as accesses - misses, I couldn't see a decent
way to know when to take the sample, not without having to take an
interrupt on every access in some circumstances.
The PAPI equivalent of this, its preset aka standard events, do not allow
profiling or interrupt on overflow for "derived" events. "derived events" has
the same meaning as your composite events. So there is precedent for not
allowing sampling on them.
Regards,
- Corey
Corey Ashford
Software Engineer
IBM Linux Technology Center, Linux Toolchain
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