Re: [PATCH 2/2 -tip] x86: perf_counter update AMD hw cachingrelated event table

[Ingo Molnar]

* Jaswinder Singh Rajput <jaswinder@xxxxxxxxxx> wrote:

> [PATCH 2/2 -tip] x86: perf_counter update AMD hw caching related event table
> 
> AMD shares same hw caching related event table.
> 
> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@xxxxxxxxx>

> -		[ C(RESULT_ACCESS) ] = 0,
> -		[ C(RESULT_MISS)   ] = 0,
> +		[ C(RESULT_ACCESS) ] = 0x0040, /* Data Cache Accesses        */
> +		[ C(RESULT_MISS)   ] = 0x0041, /* Data Cache Misses          */

How did you get to these numbers and have you tested them? (Such 
information needs to be in the changelog)

	Ingo
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/