Re: perf_counter Atom patch
From: Yong Wang
Date: Tue Jun 23 2009 - 04:16:59 EST
On Tue, Jun 23, 2009 at 09:45:03AM +0200, stephane eranian wrote:
> Unfortunately, I don't have a N270 to compare with your results.
> We need to verify whether or not N270 implements the fixed counters.
> Does it report architected perfmon v3 or v1?
All Atom processors report perfmon v3 as specified in SDM. N270 is no
> > The return value of CPUID(0xa) is indeed bogus, too and there is another quirk for that in
> > intel_pmu_init() in arch/x86/kernel/cpu/perf_counter.c
> > x86_pmu.num_counters_fixed ?? ?? ??= max((int)edx.split.num_counters_fixed, 3);
> > Is this what you were talking about?
> Not quite, because with the max() you'd have a problem on Intel Core
> Duo/Solo processors
> as they do implement the first generation of architected perfmon and
> that one did not have
> fixed counters. So you'd have to special case family=6 model=14.
That has been taken into account actually. Only perfmon v2 and above are
supported as you see in intel_pmu_init().
if (version < 2)
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