Re: [PATCH 1/3 pci#linux-next] pci: determine CLS moreintelligently

[Jesse Barnes]

On Tue, 22 Sep 2009 17:33:38 +0900
Tejun Heo <tj@xxxxxxxxxx> wrote:

> Till now, CLS has been determined either by arch code or as
> L1_CACHE_BYTES.  Only x86 and ia64 set CLS explicitly and x86 doesn't
> always get it right.  On most configurations, the chance is that
> firmware configures the correct value during boot.
> 
> This patch makes pci_init() determine CLS by looking at what firmware
> has configured.  It scans all devices and if all non-zero values
> agree, the value is used.  If none is configured or there is a
> disagreement, pci_dfl_cache_line_size is used.  arch can set the dfl
> value (via PCI_CACHE_LINE_BYTES or pci_dfl_cache_line_size) or
> override the actual one.
> 
> ia64, x86 and sparc64 updated to set the default cls instead of the
> actual one.
> 
> While at it, declare pci_cache_line_size and pci_dfl_cache_line_size
> in pci.h and drop private declarations from arch code.
> 
> Signed-off-by: Tejun Heo <tj@xxxxxxxxxx>
> Acked-by: David Miller <davem@xxxxxxxxxxxxx>
> Acked-by: Greg KH <gregkh@xxxxxxx>
> Cc: Ingo Molnar <mingo@xxxxxxx>
> Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> Cc: Tony Luck <tony.luck@xxxxxxxxx>

Applied this series to my linux-next branch, thanks.

-- 
Jesse Barnes, Intel Open Source Technology Center
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