Re: cache alias in mmap + write

From: anfei zhou
Date: Wed Jan 20 2010 - 22:06:20 EST

On Thu, Jan 21, 2010 at 9:32 AM, Jamie Lokier <jamie@xxxxxxxxxxxxx> wrote:
> KOSAKI Motohiro wrote:
>>  2. Add some commnet. almost developer only have x86 machine. so, arm
>>     specific trick need additional explicit explanation. otherwise anybody
>>     might break this code in the future.
> That's Documentation/cachetlb.txt.
> What's being discussed here is not ARM-specific, although it appears
> maintainers of different architecture (ARM and MIPS for a start) may
> have different ideas about what they are guaranteeing to userspace.
> It sounds like MIPS expects userspace to use msync() sometimes (even
> though Linux msync(MS_INVALIDATE) is quite broken), and ARM expects to
> to keep mappings coherent automatically (which is sometimes slower
> than necessary, but usually very helpful).
>>  3. Resend the patch. original mail isn't good patch format. please
>>  consider to reduce akpm suffer.
> This type of change in generic code would need review from a number of
> architecture maintainers, I'd expect.
So should I broadcast this mail in order to get their attentions,

> -- Jamie
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