On 05/05/2010 05:04 PM, Joerg Roedel wrote:It does not. Best is you check the patch, which has just been posted yesterday on xen-devel for upstream inclusion:This patch enables setting of efer bit 13 which is allowed
in all SVM capable processors. This is necessary for the
SLES11 version of Xen 4.0 to boot with nested svm.
Interesting, why does it require it?
Obviously it isn't needed since it manages to run on Intel without it.VMware's binary translation relies on VMX for running 64bit guests, on AMD you don't need SVM if you had a K8RevE (dual core 90nm) with this feature. In fact you should not be able to run VMware with 64bit guests inside a KVM guest on an Intel box (without nested VMX, that is).
/* Intel MSRs. Some also available on other CPUs */
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 74f7b9d..bc087c7 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -610,7 +610,7 @@ static __init int svm_hardware_setup(void)
if (nested) {
printk(KERN_INFO "kvm: Nested Virtualization enabled\n");
- kvm_enable_efer_bits(EFER_SVME);
+ kvm_enable_efer_bits(EFER_SVME | EFER_LMSLE);
}
for_each_possible_cpu(cpu) {
What if the host doesn't have it?
Why enable it only for the nested case? It's not svm specific (it's useful for running non-hvm Xen in non-nested mode).
Isn't there a cpuid bit for it? If so, it should be exposed to userspace, and the feature should depend on it.