On Tue, May 11, 2010 at 17:53, Dmitry Torokhov wrote:On Tue, May 11, 2010 at 11:48:36PM +0200, Johannes Weiner wrote:On Tue, May 11, 2010 at 04:54:41PM -0400, Mike Frysinger wrote:It looks liek ARM (and a few others) do this:does the phrase "DMA safe buffer" imply cache alignment ?I guess that depends on the architectural requirements. On x86,
apparently, not so much. On ARM, probably yes, as it's the
requirement to properly maintain coherency.
[dtor@hammer work]$ grep -r ARCH_KMALLOC_MINALIGN arch/
arch/sh/include/asm/page.h:#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
arch/frv/include/asm/mem-layout.h:#define ARCH_KMALLOC_MINALIGN 8
arch/powerpc/include/asm/page_32.h:#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
arch/arm/include/asm/cache.h:#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
arch/microblaze/include/asm/page.h:#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
arch/mips/include/asm/mach-tx49xx/kmalloc.h: * All happy, no need to define ARCH_KMALLOC_MINALIGN
arch/mips/include/asm/mach-ip27/kmalloc.h: * All happy, no need to define ARCH_KMALLOC_MINALIGN
arch/mips/include/asm/mach-ip32/kmalloc.h:#define ARCH_KMALLOC_MINALIGN 32
arch/mips/include/asm/mach-ip32/kmalloc.h:#define ARCH_KMALLOC_MINALIGN 128
arch/mips/include/asm/mach-generic/kmalloc.h:#define ARCH_KMALLOC_MINALIGN 128
arch/avr32/include/asm/cache.h:#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
if ARCH_KMALLOC_MINALIGN is not defined, the current allocators default to:
slub - alignof(unsigned long long)
slab - alignof(unsigned long long)
slob - alignof(unsigned long)
which for many arches can mean an alignment of merely 4 or 8
lets look at the cacheline sizes for arches that dont set
ARCH_KMALLOC_MINALIGN to L1_CACHE_BYTES:
- alplha - 32 or 64
- frv - 32 or 64
- blackfin - 32
- parisc - 32 or 64
- mn10300 - 16
- s390 - 256
- score - 16
- sparc - 32
- xtensa - 16 or 32