Re: [net-next-2.6 PATCH 2/2] x86: Align skb w/ start of cache lineon newer core 2/Xeon Arch

[David Miller]

From: "Duyck, Alexander H" <alexander.h.duyck@xxxxxxxxx>
Date: Wed, 2 Jun 2010 16:55:16 -0700

> Eric Dumazet wrote:
>> 
>> But... L1_CACHE_BYTES is 64 on MCORE2, so this matches current
>> NET_SKB_PAD definition...
>> 
>> #ifndef NET_SKB_PAD
>> #define NET_SKB_PAD 64
>> #endif
>
> I admit the current definition is redundant, but NET_SKB_PAD had
> been 32 until your recent change of the value, and prior to 2.6.30
> the value was 16.  If the value were to change again it would
> silently break the cacheline alignment which is provided by this
> patch.  If we were to define NET_SKB_PAD using L1_CACHE_BYTES in
> skbuff.h then I might be more inclined to to pull the NET_SKB_PAD
> change, but right now I would prefer to treat NET_SKB_PAD as a magic
> number that coincidently is the same size as the L1 cache on MCORE2.

Eric, why don't we do that?  Make NET_SKB_PAD's define L1_CACHE_BYTES.

Reading the comments you added when the default value was changed to
64, this seems to even be your overall intent. :-)
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