Re: [PATCH 03/10] Use percpu stats

[Eric Dumazet]

Le mardi 31 aoÃt 2010 Ã 16:31 -0400, Nitin Gupta a Ãcrit :
> On Mon, Aug 30, 2010 at 12:20 PM, Christoph Lameter <cl@xxxxxxxxx> wrote:
> > On Mon, 9 Aug 2010, Nitin Gupta wrote:
> >
> >> -static void zram_stat_inc(u32 *v)
> >> +static void zram_add_stat(struct zram *zram,
> >> +                     enum zram_stats_index idx, s64 val)
> >>  {
> >> -     *v = *v + 1;
> >> +     struct zram_stats_cpu *stats;
> >> +
> >> +     preempt_disable();
> >> +     stats = __this_cpu_ptr(zram->stats);
> >> +     u64_stats_update_begin(&stats->syncp);
> >> +     stats->count[idx] += val;
> >> +     u64_stats_update_end(&stats->syncp);
> >> +     preempt_enable();
> >
> > Maybe do
> >
> > #define zram_add_stat(zram, index, val)
> >                this_cpu_add(zram->stats->count[index], val)
> >
> > instead? It creates an add in a single "atomic" per cpu instruction and
> > deals with the fallback scenarios for processors that cannot handle 64
> > bit adds.
> >
> >
> 
> Yes, this_cpu_add() seems sufficient. I can't recall why I used u64_stats_*
> but if it's not required for atomic access to 64-bit then why was it added to
> the mainline in the first place?

Because we wanted to have fast 64bit counters, even on 32bit arches, and
this has litle to do with 'atomic' on one entity, but a group of
counters. (check drivers/net/loopback.c, lines 91-94). No lock prefix
used in fast path.

We also wanted readers to read correct values, not a value being changed
by a writer, with inconsistent 32bit halves. SNMP applications want
monotonically increasing counters.

this_cpu_add()/this_cpu_read() doesnt fit.

Even for single counter, this_cpu_read(64bit) is not using an RMW
(cmpxchg8) instruction, so you can get very strange results when low
order 32bit wraps.



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