Re: [PATCH v2 05/20] ARM: LPAE: Introduce L_PTE_NOEXEC andL_PTE_NOWRITE

[Russell King - ARM Linux]

On Fri, Nov 12, 2010 at 06:00:25PM +0000, Catalin Marinas wrote:
> The LPAE page table format needs to explicitly disable execution or
> write permissions on a page by setting the corresponding bits (similar
> to the classic page table format with Access Flag enabled). This patch
> introduces null definitions for the 2-level format and the actual noexec
> and nowrite bits for the LPAE format. It also changes several PTE
> maintenance macros and masks.
> 
> Signed-off-by: Catalin Marinas <catalin.marinas@xxxxxxx>
> ---
>  arch/arm/include/asm/pgtable-2level.h |    2 +
>  arch/arm/include/asm/pgtable.h        |   44 +++++++++++++++++++++------------
>  arch/arm/mm/mmu.c                     |    6 ++--
>  3 files changed, 33 insertions(+), 19 deletions(-)
> 
> diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
> index 36bdef7..4e21166 100644
> --- a/arch/arm/include/asm/pgtable-2level.h
> +++ b/arch/arm/include/asm/pgtable-2level.h
> @@ -128,6 +128,8 @@
>  #define L_PTE_USER		(1 << 8)
>  #define L_PTE_EXEC		(1 << 9)
>  #define L_PTE_SHARED		(1 << 10)	/* shared(v6), coherent(xsc3) */
> +#define L_PTE_NOEXEC		(0)
> +#define L_PTE_NOWRITE		(0)

Let's not make this more complicated than it has to be.  If we need the
inverse of WRITE and EXEC, then that's what we should change everyone to,
not invent a new system to work along side the old system.

We're already inverting the write bit for the vast majority of processors,
and exec has always been inverted by the ARMv6 and v7 code.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/