[git pull] PCI fixes

[Jesse Barnes]

The following changes since commit
6313e3c21743cc88bb5bd8aa72948ee1e83937b6:

  Merge branches 'x86-fixes-for-linus', 'perf-fixes-for-linus' and 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip (2010-12-08 06:40:59 -0800)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 for-linus

This has the reverts and fixes you wanted from Bjorn along with another
fix for some AMD machines with nVidia chipsets.  (I thought I had other
fixes queued up but I must have been mixing up my branches, so this is
all there is for now.)

Bjorn Helgaas (9):
      Revert "PCI: fix pci_bus_alloc_resource() hang, prefer positive decode"
      Revert "x86: allocate space within a region top-down"
      Revert "x86/PCI: allocate space from the end of a region, not the beginning"
      Revert "PCI: allocate bus resources from the top down"
      Revert "resources: support allocating space within a region from the top down"
      resources: add arch hook for preventing allocation in reserved areas
      x86: avoid low BIOS area when allocating address space
      x86: avoid E820 regions when allocating address space
      x86: avoid high BIOS area when allocating address space

Neil Horman (1):
      PCI: Update MCP55 quirk to not affect non HyperTransport variants

 Documentation/kernel-parameters.txt |    5 --
 arch/x86/include/asm/e820.h         |    3 +
 arch/x86/kernel/Makefile            |    1 +
 arch/x86/kernel/resource.c          |   48 ++++++++++++++++
 arch/x86/kernel/setup.c             |    1 -
 arch/x86/pci/i386.c                 |   18 ++----
 drivers/pci/bus.c                   |   81 ++-------------------------
 drivers/pci/quirks.c                |    3 +
 include/linux/ioport.h              |    2 +-
 kernel/resource.c                   |  104 +++-------------------------------
 10 files changed, 76 insertions(+), 190 deletions(-)
 create mode 100644 arch/x86/kernel/resource.c

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center
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