[148/152] [media] mx2_camera: fix pixel clock polarity configuration
From: Greg KH
Date: Wed Jan 05 2011 - 19:32:06 EST
2.6.36-stable review patch. If anyone has any objections, please let us know.
------------------
From: Baruch Siach <baruch@xxxxxxxxxx>
commit 42cc37fe20cc680fb58fe12ae5ba718d683b8ca2 upstream.
When SOCAM_PCLK_SAMPLE_FALLING, just leave CSICR1_REDGE unset, otherwise we get
the inverted behaviour.
Signed-off-by: Baruch Siach <baruch@xxxxxxxxxx>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@xxxxxx>
Signed-off-by: Mauro Carvalho Chehab <mchehab@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxx>
---
drivers/media/video/mx2_camera.c | 2 --
1 file changed, 2 deletions(-)
--- a/drivers/media/video/mx2_camera.c
+++ b/drivers/media/video/mx2_camera.c
@@ -791,8 +791,6 @@ static int mx2_camera_set_bus_param(stru
if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
csicr1 |= CSICR1_REDGE;
- if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
- csicr1 |= CSICR1_INV_PCLK;
if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
csicr1 |= CSICR1_SOF_POL;
if (common_flags & SOCAM_HSYNC_ACTIVE_HIGH)
--
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