[EDAC-AMD64] Display correct RAM sizes in ganged mode on F10 CPUs

[Markus Trippelsdorf]

The EDAC_AMD64 module displays only half the actual memory size, when
RAM is running in ganged mode on F10 CPUs. Fix this by moving the the
conversion factor check out of the if block, where it is never reached.

With this patch:

Unganged: 
 amd64: DRAM ECC enabled.
 EDAC amd64: F10h detected (node 0).
 EDAC amd64: using x4 syndromes.
 EDAC MC: DCT0 chip selects:
 kernel: EDAC amd64: MC: 0:  1024MB 1:  1024MB
 kernel: EDAC amd64: MC: 2:  1024MB 3:  1024MB
 kernel: EDAC amd64: MC: 4:     0MB 5:     0MB
 kernel: EDAC amd64: MC: 6:     0MB 7:     0MB
 kernel: EDAC MC: DCT1 chip selects:
 kernel: EDAC amd64: MC: 0:  1024MB 1:  1024MB
 kernel: EDAC amd64: MC: 2:  1024MB 3:  1024MB
 kernel: EDAC amd64: MC: 4:     0MB 5:     0MB
 kernel: EDAC amd64: MC: 6:     0MB 7:     0MB
 kernel: EDAC amd64: MCT channel count: 2

Ganged:
 EDAC amd64: DRAM ECC enabled.
 EDAC amd64: F10h detected (node 0).
 EDAC amd64: using x4 syndromes.
 EDAC MC: DCT0 chip selects:
 EDAC amd64: MC: 0:  2048MB 1:  2048MB
 EDAC amd64: MC: 2:  2048MB 3:  2048MB
 EDAC amd64: MC: 4:     0MB 5:     0MB
 EDAC amd64: MC: 6:     0MB 7:     0MB


diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 4a5ecc5..e872d79 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1633,10 +1633,10 @@ static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
 	u32 dbam;
 	u32 *dcsb;
 
-	if (boot_cpu_data.x86 == 0xf) {
-		if (pvt->dclr0 & F10_WIDTH_128)
-			factor = 1;
+	if (pvt->dclr0 & F10_WIDTH_128)
+		factor = 1;
 
+	if (boot_cpu_data.x86 == 0xf) {
 		/* K8 families < revF not supported yet */
 	       if (pvt->ext_model < K8_REV_F)
 			return;

-- 
Markus
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