Re: [EDAC-AMD64] Display correct RAM sizes in ganged mode on F10 CPUs

[Markus Trippelsdorf]

On 2011.02.03 at 18:09 +0100, Borislav Petkov wrote:
> On Thu, Feb 03, 2011 at 11:42:03AM -0500, Markus Trippelsdorf wrote:
> > > Of course it doesn't, doh!, we need the DRAM chip selects from the
> > > second DCT too. Can you please run this little script as root so that I
> > > can verify that BIOS is actually programming sensible values in those in
> > > ganged mode? (Yeah, leave your DCT setting to ganged in BIOS).
> > > 
> > > --
> > > #!/bin/bash
> > > 
> > > i=0x140
> > > 
> > > while (( $i <= 0x15c )); do
> > >         reg=$(printf "0x%x" $i)
> > >         setpci -s 18.2 $reg.l
> > >         i=$(($i+4))
> > > done
> > 
> > 00000000
> > 00000000
> > 00000000
> > 00000000
> > 00000000
> > 00000000
> > 00000000
> > 00000000
> 
> Ok, can you please try the following one,

Looks good, many thanks Boris.

EDAC amd64: F10h detected (node 0).
EDAC MC: DCT0 chip selects:
EDAC amd64: MC: 0:  1024MB 1:  1024MB
EDAC amd64: MC: 2:  1024MB 3:  1024MB
EDAC amd64: MC: 4:     0MB 5:     0MB
EDAC amd64: MC: 6:     0MB 7:     0MB
EDAC MC: DCT1 chip selects:
EDAC amd64: MC: 0:  1024MB 1:  1024MB
EDAC amd64: MC: 2:  1024MB 3:  1024MB
EDAC amd64: MC: 4:     0MB 5:     0MB
EDAC amd64: MC: 6:     0MB 7:     0MB

BTW another thing, while I have your attention:

cat /sys/devices/system/edac/mc/mc0/csrow0/edac_mode
prints "S4ECD4ED" aka Chipkill on my system.
But I'm using a revision C Phenom that only supports a x4 symbol size,
while the Kingston ECC DIMMs have a width of x8. So according to
table 77 (page 174) of the "BIOS and Kernel Developerâs Guide" the
system is actually running in SECDED mode and does not provide Chipkill.

-- 
Markus
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