Re: [PATCH]ARM: mmp: add Trizeps6 board support

[Eric Miao]

On Thu, Feb 10, 2011 at 7:53 AM, Yupeng Schneider
<yupeng.schneider@xxxxxxxxxxxxxxxxxx> wrote:
> Hi all,
>
> the following patch add the BSP for the Trizeps6 board with pxa168 Processor.
>
> Signed-off-by: Yupeng Schneider <yupeng.schneider@xxxxxxxxxxxxxx>

Hi Yupeng,

This is really a nice patch. I would be better if this can be separated into
some smaller patches further:

1. some of the MFP macros in trizeps6.h, they are generic and can be
placed into mfp-pxa168.h, or is there any reason that the macros in
mfp-pxa168.h do not work on your board?

2. individual patches for adding uart3, audio, and cpld

3. then the patch for the board

Sounds OK? Let me know your ideas.

Thanks
- eric

> ---
> Âarch/arm/mach-mmp/Kconfig           Â|  29 ++
> Âarch/arm/mach-mmp/Makefile           |  Â1 +
> Âarch/arm/mach-mmp/include/mach/audio.h     |  29 ++
> Âarch/arm/mach-mmp/include/mach/pxa168.h    Â|  21 +
> Âarch/arm/mach-mmp/include/mach/regs-apmu.h   |  Â1 +
> Âarch/arm/mach-mmp/include/mach/trizeps6.h   Â| Â122 ++++++
> Âarch/arm/mach-mmp/include/mach/trizeps6_cpld.h | Â 87 +++++
> Âarch/arm/mach-mmp/pxa168.c           |  10 +
> Âarch/arm/mach-mmp/trizeps6.c          | Â469
> ++++++++++++++++++++++++
> Âarch/arm/mach-mmp/trizeps6_cpld.c       Â| Â145 ++++++++
> Â10 files changed, 914 insertions(+), 0 deletions(-)
> Âcreate mode 100755 arch/arm/mach-mmp/include/mach/audio.h
> Âcreate mode 100755 arch/arm/mach-mmp/include/mach/trizeps6.h
> Âcreate mode 100755 arch/arm/mach-mmp/include/mach/trizeps6_cpld.h create
> mode 100755 arch/arm/mach-mmp/trizeps6.c
> Âcreate mode 100755 arch/arm/mach-mmp/trizeps6_cpld.c
>
> diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index
> 0711d3b..8c6be81 100644
> --- a/arch/arm/mach-mmp/Kconfig
> +++ b/arch/arm/mach-mmp/Kconfig
> @@ -64,6 +64,35 @@ config MACH_TETON_BGA
> Â Â Â Â ÂSay 'Y' here if you want to support the Marvell PXA168-based
> Â Â Â Â ÂTeton BGA Development Board.
>
> +comment "Third Party Dev Platforms (sorted by vendor name)"
> +
> +config MACH_TRIZEPS6
> + Â Â Â bool "Keith und Koep Trizeps6 DIMM-Module"
> + Â Â Â select TRIZEPS6_PCMCIA
> + Â Â Â select CPU_PXA168
> + Â Â Â help
> + Â Â Â Â Say 'Y' here if you want to support TRIZEPS VI board Development Board.
> +
> +choice
> + Â Â Â prompt "Select base board for Trizeps module"
> + Â Â Â depends on MACH_TRIZEPS6
> +
> +config MACH_TRIZEPS6_CONXS
> + Â Â Â bool "ConXS Eval Board"
> +
> +config MACH_TRIZEPS6_UCONXS
> + Â Â Â bool "uConXS Eval Board"
> +
> +config MACH_TRIZEPS6_ANY
> + Â Â Â bool "another Board"
> +
> +endchoice
> +
> +config TRIZEPS6_PCMCIA
> + Â Â Â bool
> + Â Â Â help
> + Â Â Â Â Enable PCMCIA support for Trizeps modules
> +
> Âendmenu
>
> Âconfig CPU_PXA168
> diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index
> 751cdbf..1b8744f 100644
> --- a/arch/arm/mach-mmp/Makefile
> +++ b/arch/arm/mach-mmp/Makefile
> @@ -18,3 +18,4 @@ obj-$(CONFIG_MACH_TTC_DKB) Â Â+= ttc_dkb.o
> Âobj-$(CONFIG_MACH_FLINT) Â Â Â += flint.o
> Âobj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
> Âobj-$(CONFIG_MACH_TETON_BGA) Â += teton_bga.o
> +obj-$(CONFIG_MACH_TRIZEPS6) Â Â+= trizeps6.o trizeps6_cpld.o
> diff --git a/arch/arm/mach-mmp/include/mach/audio.h
> b/arch/arm/mach-mmp/include/mach/audio.h
> index 0000000..6ef474f
> --- /dev/null
> +++ b/arch/arm/mach-mmp/include/mach/audio.h
> @@ -0,0 +1,29 @@
> +#ifndef __ASM_ARCH_AUDIO_H__
> +#define __ASM_ARCH_AUDIO_H__
> +
> +#include <sound/core.h>
> +#include <sound/pcm.h>
> +#include <sound/ac97_codec.h>
> +
> +/*
> + * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95)
> + * Â Â Â Â Â Â Âa -1 value means no gpio will be used for reset
> + * @codec_pdata: AC97 codec platform_data
> +
> + * reset_gpio should only be specified for pxa27x CPUs where a silicon +
> * bug prevents correct operation of the reset line. If not specified, + *
> the default behaviour on these CPUs is to consider gpio 113 as the + *
> AC97 reset line, which is the default on most boards.
> + */
> +struct pxa2xx_audio_ops_t {
> + Â Â Â int (*startup)(struct snd_pcm_substream *, void *);
> + Â Â Â void (*shutdown)(struct snd_pcm_substream *, void *);
> + Â Â Â void (*suspend)(void *);
> + Â Â Â void (*resume)(void *);
> + Â Â Â void *priv;
> + Â Â Â int reset_gpio;
> + Â Â Â void *codec_pdata[AC97_BUS_MAX_DEVICES];
> +};
> +
> +
> +#endif
> diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h
> b/arch/arm/mach-mmp/include/mach/pxa168.h
> index 1801e42..c4a9977 100644
> --- a/arch/arm/mach-mmp/include/mach/pxa168.h
> +++ b/arch/arm/mach-mmp/include/mach/pxa168.h
> @@ -14,9 +14,12 @@ extern void pxa168_clear_keypad_wakeup(void);
> Â#include <video/pxa168fb.h>
> Â#include <plat/pxa27x_keypad.h>
> Â#include <mach/cputype.h>
> +#include <linux/pxa168_eth.h>
> +#include <mach/audio.h>
>
> Âextern struct pxa_device_desc pxa168_device_uart1;
> Âextern struct pxa_device_desc pxa168_device_uart2;
> +extern struct pxa_device_desc pxa168_device_uart3;
> Âextern struct pxa_device_desc pxa168_device_twsi0;
> Âextern struct pxa_device_desc pxa168_device_twsi1;
> Âextern struct pxa_device_desc pxa168_device_pwm1;
> @@ -31,6 +34,9 @@ extern struct pxa_device_desc pxa168_device_ssp5;
> Âextern struct pxa_device_desc pxa168_device_nand;
> Âextern struct pxa_device_desc pxa168_device_fb;
> Âextern struct pxa_device_desc pxa168_device_keypad;
> +extern struct pxa_device_desc pxa168_device_mfu;
> +extern struct pxa_device_desc pxa168_device_ac97;
> +
>
> Âstatic inline int pxa168_add_uart(int id)
> Â{
> @@ -39,6 +45,7 @@ static inline int pxa168_add_uart(int id)
> Â Â Â Âswitch (id) {
> Â Â Â Âcase 1: d = &pxa168_device_uart1; break;
> Â Â Â Âcase 2: d = &pxa168_device_uart2; break;
> + Â Â Â case 3: d = &pxa168_device_uart3; break;
> Â Â Â Â}
>
> Â Â Â Âif (d == NULL)
> @@ -117,4 +124,18 @@ static inline int pxa168_add_keypad(struct
> pxa27x_keypad_platform_data *data)
> Â Â Â Âreturn pxa_register_device(&pxa168_device_keypad, data, sizeof(*data));
> Â}
>
> +static inline int pxa168_add_mfu(struct pxa168_eth_platform_data *data) +{
> +#if defined(CONFIG_PXA168_ETH)
> + Â Â Â return pxa_register_device(&pxa168_device_mfu, data, sizeof(*data)); +#else
> + Â Â Â return 0;
> +#endif
> +}
> +
> +static inline int pxa168_add_ac97(struct pxa2xx_audio_ops_t *ops) +{
> + Â Â Â return pxa_register_device(&pxa168_device_ac97, ops , sizeof(*ops)); +}
> +
> Â#endif /* __ASM_MACH_PXA168_H */
> diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h
> b/arch/arm/mach-mmp/include/mach/regs-apmu.h
> index ac47023..68d39bc 100644
> --- a/arch/arm/mach-mmp/include/mach/regs-apmu.h
> +++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
> @@ -27,6 +27,7 @@
> Â#define APMU_DMA Â Â Â APMU_REG(0x064)
> Â#define APMU_GEU Â Â Â APMU_REG(0x068)
> Â#define APMU_BUS Â Â Â APMU_REG(0x06c)
> +#define APMU_MFU Â Â Â APMU_REG(0x0fc)
>
> Â#define APMU_FNCLK_EN Â(1 << 4)
> Â#define APMU_AXICLK_EN (1 << 3)
> diff --git a/arch/arm/mach-mmp/include/mach/trizeps6.h
> b/arch/arm/mach-mmp/include/mach/trizeps6.h
> index 0000000..40b526a
> --- /dev/null
> +++ b/arch/arm/mach-mmp/include/mach/trizeps6.h
> @@ -0,0 +1,122 @@
> +/************************************************************************
> + * Include file for TRIZEPS6 SoM and ConXS eval-board
> + * Copyright (c) Yupeng Schneider
> + * 2010
> +
> ************************************************************************/ +
> +/*
> + * Includes/Defines
> + */
> +#ifndef _TRIPEPS6_H_
> +#define _TRIPEPS6_H_
> +
> +#define STUART_SODIMM Â1
> +
> +/* UART */
> +#define GPIO104_UART1_DSR Â Â ÂMFP_CFG(GPIO104, AF2)
> +#define GPIO105_UART1_DCD Â Â ÂMFP_CFG(GPIO105, AF2)
> +#define GPIO107_UART2_TXD Â Â ÂMFP_CFG_DRV(GPIO126, AF2, FAST)
> +#define GPIO107_UART2_RXD Â Â ÂMFP_CFG_DRV(GPIO36, AF2, FAST)
> +#define GPIO109_UART2_CTS Â Â ÂMFP_CFG(GPIO123, AF2)
> +#define GPIO109_UART2_RTS Â Â ÂMFP_CFG(GPIO124, AF2)
> +#define GPIO30_UART3_TXD Â Â Â MFP_CFG_DRV(GPIO30, AF2, FAST)
> +#define GPIO31_UART3_RXD Â Â Â MFP_CFG_DRV(GPIO31, AF2, FAST)
> +#define GPIO32_UART3_CTS Â Â Â MFP_CFG(GPIO32, AF2)
> +#define GPIO33_UART3_RTS Â Â Â MFP_CFG(GPIO33, AF2)
> +
> +/* MMC2 */
> +#define    ÂGPIO122_MMC2_DAT3    MFP_CFG_DRV(GPIO122, AF4, FAST)
> +#define    ÂGPIO121_MMC2_DAT2    MFP_CFG_DRV(GPIO121, AF4, FAST)
> +#define    ÂGPIO120_MMC2_DAT1    MFP_CFG_DRV(GPIO120, AF4, FAST)
> +#define    ÂGPIO119_MMC2_DAT0    MFP_CFG_DRV(GPIO119, AF4, FAST)
> +#define    ÂGPIO28_MMC2_CMD     MFP_CFG_DRV(GPIO28, AF6, FAST)
> +#define    ÂGPIO29_MMC2_CLK     MFP_CFG_DRV(GPIO29, AF6, FAST)
> +#define GPIO53_MMC2_CD Â Â Â Â MFP_CFG(GPIO53, AF0)
> +
> +/*MMC4*/
> +#define    ÂGPIO78_MMC4_DAT3    ÂMFP_CFG_DRV(GPIO78, AF5, FAST)
> +#define    ÂGPIO79_MMC4_DAT2    ÂMFP_CFG_DRV(GPIO79, AF5, FAST)
> +#define    ÂGPIO80_MMC4_DAT1    ÂMFP_CFG_DRV(GPIO80, AF5, FAST)
> +#define    ÂGPIO81_MMC4_DAT0    ÂMFP_CFG_DRV(GPIO81, AF5, FAST)
> +#define    ÂGPIO82_MMC4_CMD     MFP_CFG_DRV(GPIO82, AF5, FAST)
> +#define    ÂGPIO83_MMC4_CLK     MFP_CFG_DRV(GPIO83, AF5, FAST)
> +
> +/* I2C */
> +#define GPIO102_CI2C_SDA Â Â Â MFP_CFG(GPIO102, AF1)
> +
> +/* MFU */
> +#define GPIO86_TX_CLK Â MFP_CFG(GPIO86, AF5)
> +#define GPIO87_TX_EN Â ÂMFP_CFG(GPIO87, AF5)
> +#define GPIO88_TX_DQ3 Â MFP_CFG(GPIO88, AF5)
> +#define GPIO89_TX_DQ2 Â MFP_CFG(GPIO89, AF5)
> +#define GPIO90_TX_DQ1 Â MFP_CFG(GPIO90, AF5)
> +#define GPIO91_TX_DQ0 Â MFP_CFG(GPIO91, AF5)
> +#define GPIO92_MII_CRS Â MFP_CFG(GPIO92, AF5)
> +#define GPIO93_MII_COL Â MFP_CFG(GPIO93, AF5)
> +#define GPIO94_RX_CLK Â MFP_CFG(GPIO94, AF5)
> +#define GPIO95_RX_ER Â MFP_CFG(GPIO95, AF5)
> +#define GPIO96_RX_DQ3 Â MFP_CFG(GPIO96, AF5)
> +#define GPIO97_RX_DQ2 Â MFP_CFG(GPIO97, AF5)
> +#define GPIO98_RX_DQ1 Â MFP_CFG(GPIO98, AF5)
> +#define GPIO99_RX_DQ0 Â MFP_CFG(GPIO99, AF5)
> +#define GPIO100_MII_MDC Â MFP_CFG(GPIO100, AF5)
> +#define GPIO101_MII_MDIO Â MFP_CFG(GPIO101, AF5)
> +#define GPIO103_RX_DV Â MFP_CFG(GPIO103, AF5)
> +
> +/* AC97 */
> +#define GPIO115_AC97_BITCLK Â ÂMFP_CFG(GPIO115, AF6)
> +#define GPIO114_AC97_SDATA_IN_0 Â Â Â ÂMFP_CFG(GPIO114, AF6)
> +#define GPIO116_AC97_SDATA_IN_1 Â Â Â ÂMFP_CFG(GPIO116, AF6)
> +#define GPIO117_AC97_SDATA_OUT MFP_CFG(GPIO117, AF6)
> +#define GPIO118_AC97_SYNC Â Â ÂMFP_CFG(GPIO118, AF6)
> +
> +
> +
> +#define TRIZEPS6_PHYS_BASE Â Â Â Â Â Â 0xd4000000
> +
> +
> +#define TRIZEPS6_PIC_PHYS Â Â Â(0x88000000) Â Â/* CS0-3 Logic chip on ConXS */
> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Logic on ConXS-board CSFR register*/
> +#define TRIZEPS6_CFSR_PHYS Â Â (TRIZEPS6_PIC_PHYS)
> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Logic on ConXS-board BOCR register*/
> +#define TRIZEPS6_BOCR_PHYS Â Â (TRIZEPS6_PIC_PHYS+0x00200000)
> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Logic on ConXS-board IRCR register*/
> +#define TRIZEPS6_IRCR_PHYS Â Â (TRIZEPS6_PIC_PHYS+0x00300000)
> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Logic on ConXS-board UPSR register*/
> +#define TRIZEPS6_UPSR_PHYS Â Â (TRIZEPS6_PIC_PHYS+0x00280000)
> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â /* Logic on ConXS-board DICR register*/
> +#define TRIZEPS6_DICR_PHYS Â Â (TRIZEPS6_PIC_PHYS+0x00380000)
> +
> +
> +#define TRIZEPS6_CPLD_PHYS Â(0x8e000000) /* CPLD on Trizeps6 module */ +
> +#define TRIZEPS6_CPLD_CTRL_PHYS (TRIZEPS6_CPLD_PHYS)
> +#define TRIZEPS6_CPLD_FTUR_PHYS (TRIZEPS6_CPLD_PHYS+0x4)
> +#define TRIZEPS6_CPLD_HIBE_PHYS (TRIZEPS6_CPLD_PHYS+0x8)
> +#define TRIZEPS6_CPLD_PWM_PHYS (TRIZEPS6_CPLD_PHYS+0xc)
> +#define TRIZEPS6_CPLD_PLDR_PHYS (TRIZEPS6_CPLD_PHYS+0x10)
> +#define TRIZEPS6_CPLD_PSET_PHYS (TRIZEPS6_CPLD_PHYS+0x14)
> +#define TRIZEPS6_CPLD_TTLO_PHYS (TRIZEPS6_CPLD_PHYS+0x18)
> +
> +
> +/* MMC socket */
> +#define GPIO_MMC2_DET Â Â Â Â Â53
> +#define TRIZEPS6_MMC2_IRQ Â Â ÂIRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO53))
> +#define GPIO_MMC4_DET Â Â Â Â Â41
> +#define TRIZEPS6_MMC4_IRQ Â Â ÂIRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO41)
> +
> +/* Off-module PIC on ConXS board */
> +#define GPIO_PIC Â Â Â Â Â Â Â 51
> +#define TRIZEPS6_PIC_IRQ Â Â Â IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO51)
> +
> +/* PCMCIA socket Compact Flash */
> +#define GPIO_PCD Â Â Â Â Â Â Â 43 Â Â Â Â Â Â Â/* PCMCIA Card Detect */
> +#define TRIZEPS6_CD_IRQ Â Â Â Â Â Â Â ÂIRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO43)
> +#define GPIO_PRDY Â Â Â Â Â Â Â113 Â Â Â Â Â Â /* READY / nINT */
> +#define TRIZEPS6_READY_NINT Â ÂIRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO113) +
> +#define trizeps6_GPIO_CODEC_IRQ Â Â Â Â Â Â Â Â116
> +
> +extern void trizeps6_ac97_acreset(int i);
> +
> +#endif /* _TRIPEPS6_H_ */
> diff --git a/arch/arm/mach-mmp/include/mach/trizeps6_cpld.h
> b/arch/arm/mach-mmp/include/mach/trizeps6_cpld.h
> index 0000000..8538a6b
> --- /dev/null
> +++ b/arch/arm/mach-mmp/include/mach/trizeps6_cpld.h
> @@ -0,0 +1,87 @@
> +#ifndef _TRIPEPS6_CPLD_H_
> +#define _TRIPEPS6_CPLD_H_
> +
> +/* index of resource */
> +#define CTRL_S Â Â Â Â 0
> +#define CTRL_R Â Â Â Â 1
> +#define FTUR_S Â Â Â Â 2
> +#define FTUR_R Â Â Â Â 3
> +#define HIBE_S Â Â Â Â 4
> +#define HIBE_R Â Â Â Â 5
> +#define PWM Â Â Â Â Â Â6
> +#define PLDR_S Â Â Â Â 7
> +#define PLDR_R Â Â Â Â 8
> +#define PSET_S Â Â Â Â 9
> +#define PSET_R Â Â Â Â 10
> +#define TTLO_S Â Â Â Â 11
> +#define TTLO_R Â Â Â Â 12
> +
> +#define CPLD_CTRL_S cpld.addr[CTRL_S].val
> +#define CPLD_CTRL_R cpld.addr[CTRL_R].val
> +#define CPLD_CONTROL_GR Â Â Â Â Â Â Â Â Â Â Â Â(1 << 0)
> +#define CPLD_CONTROL_CODEC Â Â Â Â Â Â (1 << 2)
> +#define CPLD_CONTROL_ETHPHY Â Â Â Â Â Â(1 << 3)
> +#define CPLD_CONTROL_RWL Â Â Â Â Â Â Â (1 << 4)
> +#define CPLD_CONTROL_RBT Â Â Â Â Â Â Â (1 << 5)
> +
> +#define CPLD_FTUR_S cpld.addr[FTUR_S].val
> +#define CPLD_FTUR_R cpld.addr[FTUR_R].val
> +#define CPLD_FEATURE_UART3_SODIMM Â Â Â(1 << 0)
> +#define CPLD_FEATURE_UART3_BT Â Â Â Â Â(1 << 1)
> +#define CPLD_FEATURE_CF_MODE Â Â Â Â Â (1 << 2)
> +#define CPLD_FEATURE_TTLIO Â Â Â Â Â Â (1 << 3)
> +#define CPLD_PWM_SODIMM_P69 Â Â Â Â Â Â(1 << 4)
> +#define CPLD_PWM_SODIMM_P77 Â Â Â Â Â Â(1 << 5)
> +#define CPLD_PWM_SODIMM_P106 Â (1 << 6)
> +#define CPLD_BT_PWM_SODIMM Â Â Â Â Â Â (1 << 7)
> +
> +#define CPLD_HIBE_S cpld.addr[HIBE_S].val
> +#define CPLD_HIBE_R cpld.addr[HIBE_R].val
> +#define CPLD_HIBERNATE_MODE Â Â Â Â Â Â Â Â Â Â Â Â Â Â(1 << 0)
> +#define CPLD_HIBERNATE_WAKE_TOUCH Â Â Â Â Â Â Â(1 << 1)
> +#define CPLD_HIBERNATE_WAKE_PMIC Â Â Â Â Â Â Â (1 << 2)
> +#define CPLD_HIBERNATE_WAKE_IRQ_P43 Â Â Â Â Â Â(1 << 3)
> +
> +#define CPLD_PWM cpld.addr[PWM].val
> +
> +#define CPLD_PINLDR Â Âcpld.addr[PINLDR].val
> +#define CPLD_PINLDR_P69 Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â(1 << 0)
> +#define CPLD_PINLDR_P100_PSKTSEL Â Â Â Â Â Â Â (1 << 1)
> +#define CPLD_PINLDR_P98_CFNREG Â Â Â Â Â Â Â Â (1 << 2)
> +#define CPLD_PINLDR_P104_CFNIOIS16 Â Â Â Â Â Â (1 << 3)
> +#define CPLD_PINLDR_P93_RDNWR Â Â Â Â Â Â Â Â Â(1 << 4)
> +#define CPLD_PINLDR_P104_IRQ_P43 Â Â Â Â Â Â Â (1 << 5)
> +
> +#define CPLD_PSET_S cpld.addr[PSET_S].val
> +#define CPLD_PSET_R cpld.addr[PSET_R].val
> +#define CPLD_PINSET_P69 Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â(1 << 0)
> +#define CPLD_PINSET_P100_PSKTSEL Â Â Â Â Â Â Â (1 << 1)
> +#define CPLD_PINSET_P98_CFNREG Â Â Â Â Â Â Â Â (1 << 2)
> +#define CPLD_PINSET_P104_CFNIOIS16 Â Â Â Â Â Â (1 << 3)
> +#define CPLD_PINSET_P93_RDnWR Â Â Â Â Â Â Â Â Â(1 << 4)
> +
> +#define CPLD_TTLO_S cpld.addr[TTLO_S].val
> +#define CPLD_TTLO_R cpld.addr[TTLO_R].val
> +#define CPLD_TTLIO_W_A8 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 0)
> +#define CPLD_TTLIO_W_A9 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 1)
> +#define CPLD_TTLIO_W_A10 Â Â Â Â Â Â Â (1 << 2)
> +#define CPLD_TTLIO_W_A11 Â Â Â Â Â Â Â (1 << 3)
> +#define CPLD_TTLIO_W_A12 Â Â Â Â Â Â Â (1 << 4)
> +#define CPLD_TTLIO_W_A13 Â Â Â Â Â Â Â (1 << 5)
> +#define CPLD_TTLIO_W_A14 Â Â Â Â Â Â Â (1 << 6)
> +#define CPLD_TTLIO_W_A15 Â Â Â Â Â Â Â (1 << 7)
> +#define CPLD_TTLIO_r_A0 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 0)
> +#define CPLD_TTLIO_r_A1 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 1)
> +#define CPLD_TTLIO_r_A2 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 2)
> +#define CPLD_TTLIO_r_A3 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 3)
> +#define CPLD_TTLIO_r_A4 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 4)
> +#define CPLD_TTLIO_r_A5 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 5)
> +#define CPLD_TTLIO_r_A6 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 6)
> +#define CPLD_TTLIO_r_A7 Â Â Â Â Â Â Â Â Â Â Â Â(1 << 7)
> +
> +
> +
> +extern unsigned short trizeps6_cpld_readw(unsigned int reg);
> +extern inline void trizeps6_cpld_writew(unsigned int reg, unsigned short
> value);
> +
> +#endif /* _TRIPEPS6_CPLD_H_ */
> diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index
> 72b4e76..9c2396e 100644
> --- a/arch/arm/mach-mmp/pxa168.c
> +++ b/arch/arm/mach-mmp/pxa168.c
> @@ -66,6 +66,7 @@ void __init pxa168_init_irq(void)
> Â/* APB peripheral clocks */
> Âstatic APBC_CLK(uart1, PXA168_UART1, 1, 14745600);
> Âstatic APBC_CLK(uart2, PXA168_UART2, 1, 14745600);
> +static APBC_CLK(uart3, PXA168_UART3, 1, 14745600);
> Âstatic APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000);
> Âstatic APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000);
> Âstatic APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000);
> @@ -78,14 +79,18 @@ static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
> Âstatic APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
> Âstatic APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
> Âstatic APBC_CLK(keypad, PXA168_KPC, 0, 32000);
> +static APBC_CLK(ac97, PXA168_AC97, 0, 24576000);
> +
>
> Âstatic APMU_CLK(nand, NAND, 0x01db, 208000000);
> Âstatic APMU_CLK(lcd, LCD, 0x7f, 312000000);
> +static APMU_CLK(mfu, MFU, 0x9, 0);
>
> Â/* device and clock bindings */
> Âstatic struct clk_lookup pxa168_clkregs[] = {
> Â Â Â ÂINIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
> Â Â Â ÂINIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
> + Â Â Â INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
> Â Â Â ÂINIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
> Â Â Â ÂINIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
> Â Â Â ÂINIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),
> @@ -100,6 +105,8 @@ static struct clk_lookup pxa168_clkregs[] = {
> Â Â Â ÂINIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
> Â Â Â ÂINIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
> Â Â Â ÂINIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
> + Â Â Â INIT_CLKREG(&clk_mfu, "pxa168-eth", "MFUCLK"),
> + Â Â Â INIT_CLKREG(&clk_ac97, "pxa2xx-ac97", "AC97CLK"),
> Â};
>
> Âstatic int __init pxa168_init(void)
> @@ -149,6 +156,7 @@ void pxa168_clear_keypad_wakeup(void)
> Â/* on-chip devices */
> ÂPXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
> PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
> +PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
> ÂPXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
> ÂPXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
> ÂPXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
> @@ -163,3 +171,5 @@ PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000,
> 0x40, 58, 59);
> ÂPXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
> PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
> ÂPXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
> +PXA168_DEVICE(mfu, "pxa168-eth", -1, MFU, 0xc0800000, 0x0FFF);
> +PXA168_DEVICE(ac97, "pxa2xx-ac97", -1, AC97, 0xd402B000, 0x0fff); diff
> --git a/arch/arm/mach-mmp/trizeps6.c b/arch/arm/mach-mmp/trizeps6.c index
> 0000000..a935f14
> --- /dev/null
> +++ b/arch/arm/mach-mmp/trizeps6.c
> @@ -0,0 +1,469 @@
> +/*
> + * Âlinux/arch/arm/mach-mmp/trizeps6.c
> + *
> + * ÂSupport for the Keith und Koep Trizeps6 Modul Platform
> + * Âbased on Marvell PXA168-CPU
> + *
> + * ÂAuthor: Â ÂYupeng Schneider
> + *
> + * ÂThis program is free software; you can redistribute it and/or modify
> + * Âit under the terms of the GNU General Public License version 2 as + *
> Âpublishhed by the Free Software Foundation.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +#include <linux/platform_device.h>
> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/partitions.h>
> +#include <linux/mtd/nand.h>
> +#include <linux/delay.h>
> +#include <asm/mach-types.h>
> +#include <asm/mach/arch.h>
> +#include <mach/addr-map.h>
> +#include <mach/mfp-pxa168.h>
> +#include <mach/pxa168.h>
> +#include <mach/gpio.h>
> +#include <linux/pxa168_eth.h>
> +#include <mach/irqs.h>
> +#include <mach/trizeps6.h>
> +#include <mach/trizeps6_cpld.h>
> +#include "common.h"
> +#include <linux/mmc/sdhci.h>
> +#include <linux/ucb1400.h>
> +#include <mach/audio.h>
> +
> +
> +static unsigned long trizeps6_pin_config[] __initdata = {
> + Â Â Â /* Data Flash Interface */
> + Â Â Â GPIO0_DFI_D15,
> + Â Â Â GPIO1_DFI_D14,
> + Â Â Â GPIO2_DFI_D13,
> + Â Â Â GPIO3_DFI_D12,
> + Â Â Â GPIO4_DFI_D11,
> + Â Â Â GPIO5_DFI_D10,
> + Â Â Â GPIO6_DFI_D9,
> + Â Â Â GPIO7_DFI_D8,
> + Â Â Â GPIO8_DFI_D7,
> + Â Â Â GPIO9_DFI_D6,
> + Â Â Â GPIO10_DFI_D5,
> + Â Â Â GPIO11_DFI_D4,
> + Â Â Â GPIO12_DFI_D3,
> + Â Â Â GPIO13_DFI_D2,
> + Â Â Â GPIO14_DFI_D1,
> + Â Â Â GPIO15_DFI_D0,
> +
> + Â Â Â /* Static Memory Controller */
> + Â Â Â GPIO18_SMC_nCS0,
> + Â Â Â GPIO34_SMC_nCS1,
> + Â Â Â GPIO23_SMC_nLUA,
> + Â Â Â GPIO25_SMC_nLLA,
> + Â Â Â GPIO28_SMC_RDY,
> + Â Â Â GPIO29_SMC_SCLK,
> + Â Â Â GPIO35_SMC_BE1,
> + Â Â Â GPIO36_SMC_BE2,
> +
> +
> + Â Â Â /* UART1 */
> + Â Â Â GPIO107_UART1_RXD,
> + Â Â Â GPIO108_UART1_TXD,
> + Â Â Â GPIO107_UART1_RXD,
> + Â Â Â GPIO108_UART1_TXD,
> + Â Â Â GPIO109_UART1_RTS,
> + Â Â Â GPIO110_UART1_CTS,
> + Â Â Â GPIO111_UART1_RI,
> + Â Â Â GPIO104_UART1_DSR,
> + Â Â Â GPIO112_UART1_DTR,
> + Â Â Â GPIO105_UART1_DCD,
> +
> + Â Â Â /* UART2 */
> + Â Â Â GPIO107_UART2_TXD,
> + Â Â Â GPIO107_UART2_RXD,
> + Â Â Â GPIO109_UART2_CTS,
> + Â Â Â GPIO109_UART2_RTS,
> +
> + Â Â Â /* UART3 */
> + Â Â Â GPIO30_UART3_TXD,
> + Â Â Â GPIO31_UART3_RXD,
> + Â Â Â GPIO32_UART3_CTS,
> + Â Â Â GPIO33_UART3_RTS,
> +
> +
> + Â Â Â /* MFU */
> + Â Â Â GPIO86_TX_CLK,
> + Â Â Â GPIO87_TX_EN,
> + Â Â Â GPIO88_TX_DQ3,
> + Â Â Â GPIO89_TX_DQ2,
> + Â Â Â GPIO90_TX_DQ1,
> + Â Â Â GPIO91_TX_DQ0,
> + Â Â Â GPIO92_MII_CRS,
> + Â Â Â GPIO93_MII_COL,
> + Â Â Â GPIO94_RX_CLK,
> + Â Â Â GPIO95_RX_ER,
> + Â Â Â GPIO96_RX_DQ3,
> + Â Â Â GPIO97_RX_DQ2,
> + Â Â Â GPIO98_RX_DQ1,
> + Â Â Â GPIO99_RX_DQ0,
> + Â Â Â GPIO100_MII_MDC,
> + Â Â Â GPIO101_MII_MDIO,
> + Â Â Â GPIO103_RX_DV,
> +
> + Â Â Â /* USB OTG */
> + Â Â Â GPIO85_GPIO,
> + Â Â Â GPIO47_GPIO,
> +
> + Â Â Â /* i2c bus */
> + Â Â Â GPIO102_CI2C_SDA,
> + Â Â Â GPIO106_CI2C_SCL,
> +
> +
> + Â Â Â /* MMC2 */
> + Â Â Â GPIO122_MMC2_DAT3 | MFP_PULL_HIGH,
> + Â Â Â GPIO121_MMC2_DAT2 | MFP_PULL_HIGH,
> + Â Â Â GPIO120_MMC2_DAT1 | MFP_PULL_HIGH,
> + Â Â Â GPIO119_MMC2_DAT0 | MFP_PULL_HIGH,
> + Â Â Â GPIO28_MMC2_CMD | MFP_PULL_HIGH,
> + Â Â Â GPIO29_MMC2_CLK,
> + Â Â Â GPIO53_MMC2_CD | MFP_PULL_LOW, Â Â Â Â Â Â Â Â Â/* TRIZEPS6_MMC2_IRQ */
> +
> + Â Â Â /* MMC4 */
> + Â Â Â GPIO78_MMC4_DAT3 | MFP_PULL_HIGH,
> + Â Â Â GPIO79_MMC4_DAT2 | MFP_PULL_HIGH,
> + Â Â Â GPIO80_MMC4_DAT1 | MFP_PULL_HIGH,
> + Â Â Â GPIO81_MMC4_DAT0 | MFP_PULL_HIGH,
> + Â Â Â GPIO82_MMC4_CMD | MFP_PULL_HIGH,
> + Â Â Â GPIO83_MMC4_CLK,
> +
> + Â Â Â /* LCD */
> + Â Â Â GPIO56_LCD_FCLK_RD,
> + Â Â Â GPIO57_LCD_LCLK_A0,
> + Â Â Â GPIO58_LCD_PCLK_WR,
> + Â Â Â GPIO59_LCD_DENA_BIAS,
> + Â Â Â GPIO60_LCD_DD0,
> + Â Â Â GPIO61_LCD_DD1,
> + Â Â Â GPIO62_LCD_DD2,
> + Â Â Â GPIO63_LCD_DD3,
> + Â Â Â GPIO64_LCD_DD4,
> + Â Â Â GPIO65_LCD_DD5,
> + Â Â Â GPIO66_LCD_DD6,
> + Â Â Â GPIO67_LCD_DD7,
> + Â Â Â GPIO68_LCD_DD8,
> + Â Â Â GPIO69_LCD_DD9,
> + Â Â Â GPIO70_LCD_DD10,
> + Â Â Â GPIO71_LCD_DD11,
> + Â Â Â GPIO72_LCD_DD12,
> + Â Â Â GPIO73_LCD_DD13,
> + Â Â Â GPIO74_LCD_DD14,
> + Â Â Â GPIO75_LCD_DD15,
> +
> +
> + Â Â Â /* AC97 */
> + Â Â Â GPIO115_AC97_BITCLK,
> + Â Â Â GPIO114_AC97_SDATA_IN_0,
> + Â Â Â GPIO117_AC97_SDATA_OUT,
> + Â Â Â GPIO118_AC97_SYNC,
> + Â Â Â GPIO116_GPIO,
> +
> +
> + Â Â Â GPIO51_GPIO, Â Â Â Â Â Â Â Â Â Â/* TRIZEPS6_PIC_IRQ */
> + Â Â Â GPIO27_GPIO, Â Â Â Â Â Â Â Â Â Â/* Ethernet IRQ */
> +};
> +
> +
> +
> +/****************************************************************************
> + * CPLD
> +
> ****************************************************************************/
> +
> +static struct resource tri6_cpld_resources[] = {
> + Â Â Â [CTRL_S] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_CTRL_PHYS,
> +        .end  Â= TRIZEPS6_CPLD_CTRL_PHYS+1,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [CTRL_R] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_CTRL_PHYS+2,
> +        .end  Â= TRIZEPS6_CPLD_CTRL_PHYS+3,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [FTUR_S] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_FTUR_PHYS,
> +        .end  Â= TRIZEPS6_CPLD_FTUR_PHYS+1,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [FTUR_R] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_FTUR_PHYS+2,
> +        .end  Â= TRIZEPS6_CPLD_FTUR_PHYS+3,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [HIBE_S] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_HIBE_PHYS,
> +        .end  Â= TRIZEPS6_CPLD_HIBE_PHYS+1,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [HIBE_R] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_HIBE_PHYS+2,
> +        .end  Â= TRIZEPS6_CPLD_HIBE_PHYS+3,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [PWM] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_PWM_PHYS,
> +        .end  Â= TRIZEPS6_CPLD_PWM_PHYS+1,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [PLDR_S] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_PLDR_PHYS,
> +        .end  Â= TRIZEPS6_CPLD_PLDR_PHYS+1,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [PLDR_R] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_PLDR_PHYS+2,
> +        .end  Â= TRIZEPS6_CPLD_PLDR_PHYS+3,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [PSET_S] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_PSET_PHYS,
> +        .end  Â= TRIZEPS6_CPLD_PSET_PHYS+1,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [PSET_R] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_PSET_PHYS+2,
> +        .end  Â= TRIZEPS6_CPLD_PSET_PHYS+3,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [TTLO_S] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_TTLO_PHYS,
> +        .end  Â= TRIZEPS6_CPLD_TTLO_PHYS+1,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> + Â Â Â [TTLO_R] = {
> + Â Â Â Â Â Â Â .start Â= TRIZEPS6_CPLD_TTLO_PHYS+2,
> +        .end  Â= TRIZEPS6_CPLD_TTLO_PHYS+3,
> + Â Â Â Â Â Â Â .flags Â= IORESOURCE_MEM,
> + Â Â Â },
> +};
> +
> +static int tri6_cpld_platdata = 1;
> +
> +static struct platform_device cpld_device = {
> +    .name      = "trizeps6-cpld",
> +    .id       = -1,
> + Â Â Â .num_resources Â= ARRAY_SIZE(tri6_cpld_resources),
> +    .resource    = tri6_cpld_resources,
> +    .dev      Â= {
> + Â Â Â Â Â Â Â .platform_data = &tri6_cpld_platdata,
> + Â Â Â }
> +};
> +
> +
> +/******************************************************************************
> + * Audio and Touchscreen
> +
> ******************************************************************************/
> +
> +static struct ucb1400_pdata trizeps6_ucb1400_pdata = {
> +    .irq      Â= Âgpio_to_irq(trizeps6_GPIO_CODEC_IRQ),
> +};
> +
> +static struct pxa2xx_audio_ops_t trizeps6_ac97_pdata = {
> +    .codec_pdata  Â= { &trizeps6_ucb1400_pdata, },
> +};
> +
> +static struct platform_device trizeps6_ucb1400_device = {
> +    .name      = "ucb1400_core",
> +    .id       = -1,
> +    .dev      Â= {
> + Â Â Â Â Â Â Â .platform_data = &trizeps6_ucb1400_pdata,
> + Â Â Â },
> +};
> +
> +static void __init trizeps6_ts_init(void)
> +{
> + Â Â Â pxa168_add_ac97(&trizeps6_ac97_pdata);
> + Â Â Â platform_device_register(&trizeps6_ucb1400_device);
> +}
> +
> +void trizeps6_ac97_acreset(int i)
> +{ Â Â Âunsigned short value;
> +
> + Â Â Â if (i == 1) {
> +
> + Â Â Â Â Â Â Â value = trizeps6_cpld_readw(CTRL_S);
> + Â Â Â Â Â Â Â trizeps6_cpld_writew(CTRL_S, value | CPLD_CONTROL_CODEC);
> + Â Â Â }
> + Â Â Â if (!i) {
> + Â Â Â Â Â Â Â value = trizeps6_cpld_readw(CTRL_R);
> + Â Â Â Â Â Â Â trizeps6_cpld_writew(CTRL_R, value | CPLD_CONTROL_CODEC);
> + Â Â Â }
> +}
> +
> +/******************************************************************************
> + * Ethernet
> +
> ******************************************************************************/
> +static int trizeps6_eth_init(void)
> +{
> + Â Â Â unsigned short value;
> +
> + Â Â Â value = trizeps6_cpld_readw(CTRL_R);
> + Â Â Â trizeps6_cpld_writew(CTRL_R, value | CPLD_CONTROL_ETHPHY);
> + Â Â Â return 0;
> +
> +}
> +
> +static struct pxa168_eth_platform_data trizeps6_eth_data = {
> +    .phy_addr    = 0x1f,
> + Â Â Â .port_number = 0,
> +    .init      = trizeps6_eth_init,
> +};
> +
> +/******************************************************************************
> + * NAND
> +
> ******************************************************************************/
> +static struct pxa3xx_nand_timing stnand02gw3b2d_timing = {
> + Â Â Â .tCH Â Â= 10,
> + Â Â Â .tCS Â Â= 40,
> + Â Â Â .tWH Â Â= 20,
> + Â Â Â .tWP Â Â= 24,
> + Â Â Â .tRH Â Â= 20,
> + Â Â Â .tRP Â Â= 24,
> + Â Â Â .tR Â Â Â Â = 50000,
> + Â Â Â .tWHR Â = 120,
> + Â Â Â .tAR Â Â= 20,
> +
> +};
> +
> +static struct pxa3xx_nand_cmdset largepage_cmdset = {
> + Â Â Â .read1 Â Â Â Â Â= 0x3000,
> + Â Â Â .read2 Â Â Â Â Â= 0x0050,
> +    .program    Â= 0x1080,
> +    .read_status  Â= 0x0070,
> +    .read_id    Â= 0x0090,
> +    .erase     Â= 0xD060,
> +    .reset     Â= 0x00FF,
> +    .lock      = 0x002A,
> +    .unlock     = 0x2423,
> +    .lock_status  Â= 0x007A,
> +};
> +
> +static struct pxa3xx_nand_flash trizeps6_flashes[] = {
> + Â Â Â {
> + Â Â Â Â Â Â Â .timing = &stnand02gw3b2d_timing,
> + Â Â Â Â Â Â Â .cmdset = &largepage_cmdset,
> + Â Â Â Â Â Â Â .page_per_block = 64,
> +        .page_size   Â= 2048,
> +        .flash_width  Â= 8,
> +        .dfc_width   Â= 8,
> +        .num_blocks   = 2048,
> +        .chip_id    Â= 0xda20,
> + Â Â Â },
> +};
> +
> +
> +static struct mtd_partition trizeps6_nand_partitions[] = {
> + Â Â Â {
> +        .name      = "bootloader",
> +        .offset     = 0,
> +        .size      = SZ_16M,
> +        .mask_flags   = MTD_WRITEABLE,
> + Â Â Â }, {
> +        .name      = "reserved",
> +        .offset     = MTDPART_OFS_APPEND,
> +        .size      = SZ_128K,
> +        .mask_flags   = MTD_WRITEABLE,
> + Â Â Â }, {
> +        .name      = "kernel",
> +        .offset     = MTDPART_OFS_APPEND,
> +        .size      = (2*SZ_2M + SZ_1M),
> +        .mask_flags   = 0,
> + Â Â Â }, {
> +        .name      = "filesystem",
> +        .offset     = MTDPART_OFS_APPEND,
> + Â Â Â Â Â Â Â .size = (SZ_256M - 3*SZ_8M),
> +        .mask_flags   = 0,
> + Â Â Â }
> +};
> +
> +static struct pxa3xx_nand_platform_data trizeps6_nand_info = {
> + Â Â Â .enable_arbiter = 1,
> +    .parts     Â= trizeps6_nand_partitions,
> +    .nr_parts    = ARRAY_SIZE(trizeps6_nand_partitions),
> +    .flash   Â= trizeps6_flashes,
> + Â Â Â .num_flash Â= ARRAY_SIZE(trizeps6_flashes),
> + Â Â Â .keep_config = 0
> +};
> +
> +
> +
> +static struct i2c_board_info trizeps6_i2c_devices[] Â= {
> + Â Â Â { I2C_BOARD_INFO("pcf8593", 0x51), },
> +};
> +
> +
> +/******************************************************************************
> + * LCD
> +
> ******************************************************************************/
> +static struct fb_videomode trizeps6_video_modes[] = {
> + Â Â Â [0] = {
> +        .pixclock    = 39720,
> +        .refresh    Â= 60,
> +        .xres      = 640,
> +        .yres      = 480,
> +        .hsync_len   Â= 63,
> +        .left_margin  Â= 12,
> +        .right_margin  = 12,
> +        .vsync_len   Â= 4,
> +        .upper_margin  = 32,
> +        .lower_margin  = 10,
> +        .sync      = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
> + Â Â Â },
> +};
> +
> +static struct pxa168fb_mach_info trizeps6_lcd_info = {
> +    .id           = "Base-trizeps6",
> +    .modes         Â= trizeps6_video_modes,
> +    .num_modes       Â= ARRAY_SIZE(trizeps6_video_modes),
> +    .pix_fmt        Â= PIX_FMT_RGB565,
> + Â Â Â .io_pin_allocation_mode = PIN_MODE_DUMB_16_GPIO,
> +    .dumb_mode       Â= DUMB_MODE_RGB565,
> +    .active         = 1,
> +    .panel_rbswap      = 1,
> +    .invert_pixclock    Â= 0,
> +};
> +
> +
> +static struct platform_device *trizeps6_devices[] __initdata = {
> + Â Â Â &cpld_device,
> +};
> +
> +static void __init trizeps6_init(void)
> +{
> + Â Â Â mfp_config(ARRAY_AND_SIZE(trizeps6_pin_config));
> +
> + Â Â Â pxa168_add_uart(1);
> + Â Â Â pxa168_add_uart(2);
> +#ifdef STUART_SODIMM
> + Â Â Â pxa168_add_uart(3);
> +#endif
> + Â Â Â pxa168_add_nand(&trizeps6_nand_info);
> + Â Â Â platform_add_devices(trizeps6_devices,
> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ARRAY_SIZE(trizeps6_devices));
> +
> + Â Â Â pxa168_add_fb(&trizeps6_lcd_info);
> + Â Â Â pxa168_add_mfu(&trizeps6_eth_data);
> + Â Â Â pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(trizeps6_i2c_devices));
> + Â Â Â trizeps6_ts_init();
> +}
> +
> +static void __init trizeps6_map_io(void)
> +{
> + Â Â Â mmp_map_io();
> +}
> +
> +MACHINE_START(TRIZEPS6, "PXA168-based Keith & Koep Trizeps VI Development
> Module")
> + Â Â Â /* MAINTAINER("Yupeng Schneider" <yupeng.schneider@xxxxxxxxxxxxxx>) */
> +    .map_io     = trizeps6_map_io,
> +    .init_irq    = pxa168_init_irq,
> +    .timer     Â= &pxa168_timer,
> +    .init_machine  = trizeps6_init,
> +MACHINE_END
> +
> +
> diff --git a/arch/arm/mach-mmp/trizeps6_cpld.c
> b/arch/arm/mach-mmp/trizeps6_cpld.c
> index 0000000..2577b0f
> --- /dev/null
> +++ b/arch/arm/mach-mmp/trizeps6_cpld.c
> @@ -0,0 +1,145 @@
> +/*
> + * Âlinux/arch/arm/mach-mmp/trizeps6_cpld.c
> + *
> + *
> + * ÂAuthor: Â ÂYupeng Schneider
> + * ÂCreated: Â 27 10, 2010
> + * ÂCopyright: Yupeng Schneider
> + *
> + * ÂThis program is free software; you can redistribute it and/or modify
> + * Âit under the terms of the GNU General Public License version 2 as + *
> Âpublished by the Free Software Foundation.*/
> +
> +#include <linux/kernel.h>
> +#include <linux/ioport.h>
> +#include <linux/platform_device.h>
> +#include <linux/device.h>
> +#include <linux/module.h>
> +
> +#include <asm/io.h>
> +#include <asm/delay.h>
> +#include <mach/trizeps6.h>
> +#include <mach/trizeps6_cpld.h>
> +
> +struct cpld_info {
> + Â Â Â struct region {
> + Â Â Â Â Â Â Â struct resource *res;
> + Â Â Â Â Â Â Â struct resource *req;
> +        void __iomem  Â*iom;
> +        unsigned short  val;
> + Â Â Â } addr[7];
> +} cpld_info;
> +
> +static struct cpld_info cpld = { { { 0 } } };
> +
> +inline void trizeps6_cpld_writew(unsigned int reg, unsigned short value) +{
> + Â Â Â if ((cpld.addr[reg].iom != NULL))
> + Â Â Â Â Â Â Â writew(value, cpld.addr[reg].iom);
> +
> +}
> +
> +unsigned short trizeps6_cpld_readw(unsigned int reg)
> +{
> + Â Â Â short value = 0;
> + Â Â Â if (reg != HIBE_S || reg != HIBE_R || reg != PWM || reg != PSET_S || reg
> != PSET_R) {
> +
> + Â Â Â Â Â Â Â if ((cpld.addr[reg].iom != NULL))
> + Â Â Â Â Â Â Â Â Â Â Â value = readw(cpld.addr[reg].iom);
> + Â Â Â }
> + Â Â Â return value;
> +}
> +EXPORT_SYMBOL(trizeps6_cpld_readw);
> +
> +static int trizeps6_cpld_probe(struct platform_device *pdev)
> +{
> + Â Â Â int i;
> +
> + Â Â Â CPLD_CTRL_R = CPLD_CONTROL_ETHPHY | CPLD_CONTROL_GR;
> +#ifdef STUART_SODIMM
> + Â Â Â CPLD_FTUR_S = CPLD_FEATURE_UART3_SODIMM;
> +#endif
> + Â Â Â for (i = CTRL_S; i <= TTLO_R; i++) {
> + Â Â Â Â Â Â Â cpld.addr[i].res = platform_get_resource(pdev, IORESOURCE_MEM, i);
> + Â Â Â Â Â Â Â if (cpld.addr[i].res == NULL) {
> + Â Â Â Â Â Â Â Â Â Â Â dev_err(&pdev->dev, "cannot get resource %d area\n", i);
> + Â Â Â Â Â Â Â Â Â Â Â return -EIO;
> + Â Â Â Â Â Â Â }
> + Â Â Â Â Â Â Â cpld.addr[i].req = request_mem_region(cpld.addr[i].res->start,
> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â 2, pdev->name);
> + Â Â Â Â Â Â Â if (cpld.addr[i].req == NULL) {
> + Â Â Â Â Â Â Â Â Â Â Â dev_err(&pdev->dev, "cannot claim addr area %d\n", i);
> + Â Â Â Â Â Â Â Â Â Â Â return -EIO;
> + Â Â Â Â Â Â Â }
> + Â Â Â Â Â Â Â cpld.addr[i].iom = ioremap(cpld.addr[i].res->start, 2);
> + Â Â Â Â Â Â Â if (cpld.addr[i].iom == NULL) {
> + Â Â Â Â Â Â Â Â Â Â Â dev_err(&pdev->dev, "cannot remap addr area %d\n", i);
> + Â Â Â Â Â Â Â Â Â Â Â return -EIO;
> + Â Â Â Â Â Â Â }
> + Â Â Â Â Â Â Â switch (i) {
> + Â Â Â Â Â Â Â case CTRL_R:
> + Â Â Â Â Â Â Â Â Â Â Â trizeps6_cpld_writew(CTRL_R, CPLD_CTRL_R);
> + Â Â Â Â Â Â Â Â Â Â Â break;
> + Â Â Â Â Â Â Â case FTUR_S:
> + Â Â Â Â Â Â Â Â Â Â Â trizeps6_cpld_writew(FTUR_S, CPLD_FTUR_S);
> + Â Â Â Â Â Â Â Â Â Â Â break;
> + Â Â Â Â Â Â Â default:
> + Â Â Â Â Â Â Â Â Â Â Â ;
> +
> + Â Â Â Â Â Â Â }
> + Â Â Â Â Â Â Â dev_dbg(&pdev->dev, "mapped region Â[%d] %08x -> %p\n", i,
> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â (int)cpld.addr[i].req->start, cpld.addr[i].iom);
> + Â Â Â }
> +
> +
> + Â Â Â return 0;
> +}
> +
> +static int trizeps6_cpld_remove(struct platform_device *pdev)
> +{
> + Â Â Â dev_dbg(&pdev->dev, "trizeps6_cpld_remove()\n");
> + Â Â Â return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int trizeps6_cpld_suspend(struct platform_device *pdev,
> pm_message_t state)
> +{
> + Â Â Â return 0;
> +}
> +
> +static int trizeps6_cpld_resume(struct platform_device *pdev)
> +{
> + Â Â Â return 0;
> +}
> +#endif
> +
> +static struct platform_driver trizeps6_cpld_driver = {
> +    .probe     Â= trizeps6_cpld_probe,
> +    .remove     = trizeps6_cpld_remove,
> +#ifdef CONFIG_PM
> +    .suspend    Â= trizeps6_cpld_suspend,
> +    .resume     = trizeps6_cpld_resume,
> +#endif
> +    .driver     = {
> +        .name      = "trizeps6-cpld",
> + Â Â Â },
> +};
> +
> +
> +static int __devinit trizeps6_cpld_init(void)
> +{
> +
> + Â Â Â return platform_driver_register(&trizeps6_cpld_driver);
> +}
> +
> +static void trizeps6_cpld_exit(void)
> +{
> + Â Â Â platform_driver_unregister(&trizeps6_cpld_driver);
> +}
> +
> +arch_initcall(trizeps6_cpld_init);
> +module_exit(trizeps6_cpld_exit);
> +
> +MODULE_AUTHOR("Yupeng Schneider <yupeng.schneider@xxxxxxxxxxxxxx>");
> +MODULE_DESCRIPTION("Trizeps VI CPLD");
> +MODULE_LICENSE("GPL");
> --
> 1.6.3.3
>
>
>
>
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