[PATCH 3/6] x86: ifdef INTR_REMAP code out

[Henrik Kretzschmar]

Interrupt remapping is only available on 64-bit machines,
so it has no place in lapic_resume() for 32bit machines.

Compilation on 32bit machines would produce errors here.

Signed-off-by: Henrik Kretzschmar <henne@xxxxxxxxxxxxxxxx>
---
 arch/x86/kernel/apic/apic.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 27a7497..999c531 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -2109,12 +2109,15 @@ static int lapic_resume(struct sys_device *dev)
 	unsigned long flags;
 	int maxlvt;
 	int ret = 0;
-	struct IO_APIC_route_entry **ioapic_entries = NULL;
 
 	if (!apic_pm_state.active)
 		return 0;
 
 	local_irq_save(flags);
+
+#ifdef CONFIG_INTR_REMAP
+	struct IO_APIC_route_entry **ioapic_entries = NULL;
+
 	if (intr_remapping_enabled) {
 		ioapic_entries = alloc_ioapic_entries();
 		if (!ioapic_entries) {
@@ -2133,6 +2136,7 @@ static int lapic_resume(struct sys_device *dev)
 		mask_IO_APIC_setup(ioapic_entries);
 		legacy_pic->mask_all();
 	}
+#endif
 
 	if (x2apic_mode)
 		enable_x2apic();
@@ -2173,6 +2177,7 @@ static int lapic_resume(struct sys_device *dev)
 	apic_write(APIC_ESR, 0);
 	apic_read(APIC_ESR);
 
+#ifdef CONFIG_INTR_REMAP
 	if (intr_remapping_enabled) {
 		reenable_intr_remapping(x2apic_mode);
 		legacy_pic->restore_mask();
@@ -2180,6 +2185,7 @@ static int lapic_resume(struct sys_device *dev)
 		free_ioapic_entries(ioapic_entries);
 	}
 restore:
+#endif
 	local_irq_restore(flags);
 
 	return ret;
-- 
1.7.2.3

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