RE: Interrupt Latencies

[Thomas Gleixner]

On Tue, 22 Feb 2011, Schaefer Dr, Frank-Rene () wrote:

Please do not top post.

> We are using GPIO pins and map them to IRQ. 

How are the GPIO pins accessed ? Are they memory mapped registers or what ?

> The underlying driver seems to use message signaled interrupts.

That does not answer which driver is involved. W/o seing the code I
can't tell much.

Thanks,

	tglx

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