[PATCH 1/2] staging: rts_pstor: modify initial card clock

[wei_wang]

From: wwang <wei_wang@xxxxxxxxxxxxxx>

Modify initial card clock to avoid over spec

Signed-off-by: wwang <wei_wang@xxxxxxxxxxxxxx>
---
 drivers/staging/rts_pstor/rtsx.c |   14 +++++++-------
 1 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/staging/rts_pstor/rtsx.c b/drivers/staging/rts_pstor/rtsx.c
index 4514419..02525d5 100644
--- a/drivers/staging/rts_pstor/rtsx.c
+++ b/drivers/staging/rts_pstor/rtsx.c
@@ -824,13 +824,13 @@ static void rtsx_init_options(struct rtsx_chip *chip)
 	chip->fpga_ms_hg_clk = CLK_80;
 	chip->fpga_ms_4bit_clk = CLK_80;
 	chip->fpga_ms_1bit_clk = CLK_40;
-	chip->asic_sd_sdr104_clk = 207;
-	chip->asic_sd_sdr50_clk = 99;
-	chip->asic_sd_ddr50_clk = 99;
-	chip->asic_sd_hs_clk = 99;
-	chip->asic_mmc_52m_clk = 99;
-	chip->asic_ms_hg_clk = 119;
-	chip->asic_ms_4bit_clk = 79;
+	chip->asic_sd_sdr104_clk = 203;
+	chip->asic_sd_sdr50_clk = 98;
+	chip->asic_sd_ddr50_clk = 98;
+	chip->asic_sd_hs_clk = 98;
+	chip->asic_mmc_52m_clk = 98;
+	chip->asic_ms_hg_clk = 117;
+	chip->asic_ms_4bit_clk = 78;
 	chip->asic_ms_1bit_clk = 39;
 	chip->ssc_depth_sd_sdr104 = SSC_DEPTH_2M;
 	chip->ssc_depth_sd_sdr50 = SSC_DEPTH_2M;
-- 
1.7.4.1

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