Re: [PATCH -tip] perf, x86: P4 PMU - Add missing read of a counterbefore test

[Cyrill Gorcunov]

On 03/24/2011 07:33 PM, Ingo Molnar wrote:
> 
> * Cyrill Gorcunov <gorcunov@xxxxxxxxx> wrote:
> 
>> On 03/24/2011 11:48 AM, Ingo Molnar wrote:
>>>
>>> * Cyrill Gorcunov <gorcunov@xxxxxxxxx> wrote:
>>>
>>>> Don, I've added yours SOB, ok? (The patch is attached to avoid
>>>> space/tabs problem
>>>> due to web-mail client)
>>>
>>> The patch lacks a proper description about the motivation and effects of the 
>>> patch.
>>>
>>> Thanks,
>>>
>>> 	Ingo
>>
>> Ingo, does this one looks better?
>>
>> ---
>> From: Don Zickus <dzickus@xxxxxxxxxx>
>> Subject: [PATCH -tip] perf, x86: P4 PMU - Add missing read of MSR register to catch unflagged overflows
>>
>> The read of a proper MSR register was missed so instead of a counter the 
>> configration register is tested (it has ARCH_P4_UNFLAGGED_BIT always cleared) 
>> and unflagged overflows never have been catched. Fix it by reading a proper 
>> MSR register.
> 
> So what effect does this have on the regular perf user? Please try to describe 
> the real-life effect of the bug/problem fixed here.
> 
> Thanks,
> 
> 	Ingo

Unflagged overflows never have been catched due to missed read of a register which
is to signalize about it, and as result unknown nmi may happen leading to
"Dazen and confused" message. That is what supposed to be in changelog?

-- 
    Cyrill
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