Re: [PATCH -tip] perf, x86: P4 PMU - Add missing read of a counterbefore test

[Cyrill Gorcunov]

On 03/24/2011 09:22 PM, Don Zickus wrote:
> On Thu, Mar 24, 2011 at 07:46:40PM +0300, Cyrill Gorcunov wrote:
>>>> The read of a proper MSR register was missed so instead of a counter the 
>>>> configration register is tested (it has ARCH_P4_UNFLAGGED_BIT always cleared) 
>>>> and unflagged overflows never have been catched. Fix it by reading a proper 
>>>> MSR register.
>>>
>>> So what effect does this have on the regular perf user? Please try to describe 
>>> the real-life effect of the bug/problem fixed here.
>>>
>>> Thanks,
>>>
>>> 	Ingo
>>
>> Unflagged overflows never have been catched due to missed read of a register which
>> is to signalize about it, and as result unknown nmi may happen leading to
>> "Dazen and confused" message. That is what supposed to be in changelog?
> 
> I think Ingo is looking for something like this:
> 

Thanks Don, if Ingo agree I can update it.

-- 
    Cyrill
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