Re: advice sought: practicality of SMP cache coherency implementedin assembler (and a hardware detect line)

[Paul E. McKenney]

On Mon, Mar 28, 2011 at 07:48:34PM +0100, Luke Kenneth Casson Leighton wrote:
> On Mon, Mar 28, 2011 at 7:06 PM, Paul E. McKenney
> <paulmck@xxxxxxxxxxxxxxxxxx> wrote:
> >> Basically it would become a cluster with a very very fast "page transfer"
> >> operation for moving data between nodes.
> >
> > This works for applications coded specially for this platform, but unless
> > I am missing something, not for existing pthreads applications.  Might
> > be able to handle things like Erlang that do parallelism without shared
> > memory.
> 
>  ok - well, having thought about this a little bit (in a non-detailed
> high-level way) i was sort-of hoping, as alan hinted at, to still do
> SMP, even if it's slow, for userspace.   the primary thing to prevent
> from happening is to have kernelspace data structures from
> conflicting.
> 
>  i found kerrigan, btw, spoke to the people on it: louis agreed that
> the whole idea was mad as hell and was therefore actually very
> interesting to attempt :)

What was that old Chinese curse?  "May you live in interesting times"
or something like that?  ;-)

I suspect that you can get something that runs suboptimally but mostly
works.  Getting something that really works likely requires that the
hardware support cache coherence.

>  as a first approximation i'm absolutely happy for existing pthreads
> applications to be forced to run on the same core.

In a past life, we forced any given pthread process to have all of
its threads confined to a single NUMA node, so I guess that there is
precedent.  The next step is figuring out how to identify apps that
use things like mmap() to share memory among otherwise unrelated
processes, and working out what to do with them.

							Thanx, Paul
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