Re: [PATCH 1/3] x86, intel: Output microcode revision

[Ingo Molnar]

* Andi Kleen <ak@xxxxxxxxxxxxxxx> wrote:

> > > This can happen if for example the BIOS somehow does not apply the right 
> > > microcode to all CPUs. It can also happen if physically different microcode 
> > > version CPUs are mixed. In theory people can mix steppings as well.
> > 
> > In PRACTICE people WILL mix steppings as well.
> 
> Yes exactly. I used to have a system with one P3 supporting FXSAVE
> and other not :-) I had to fix the kernel back then to support this.
> The system worked perfectly fine after the kernel was fixed.

I'm not concerned about the cases where it works fine - i'm concerned 
about cases where it's not fine.

Many years ago i had an old P3 system where i mixed steppings and it 
was not stable, it would crash after i have put some load on the 
system.

> So the check proposed is a bad idea. It would trigger on real boxes 
> which don't have any obvious problems.

You are quite naive about mixed stepping i have to say - mixing 
steppings was always a risk and can come with various problems:

   http://mysite.verizon.net/pchardwarelinks/mixed.htm

 Mixing processor steppings (revisions) in a dual environment doesn't 
 always work as well as it should. As a rule of thumb, one stepping 
 difference between two CPUs is generally acceptable. Two steppings is 
 pushing it. Note that some revisions of some operating systems may be 
 more forgiving than others (like WinNT) concerning mixed steppings. 
 The motherboard manufacturer can also give you information about 
 which mixed steppings (if any) are compatible with the motherboard. 
 It's always best to buy matched pairs or to find another chip with 
 the same S-Spec number. Although in many cases, finding an identical 
 chip is quite difficult.

   http://www.intel.com/support/motherboards/server/sb/cs-022150.htm

 Mixed steppings of processors are only supported with the following 
 paired combinations of A1 and A2 steppings of the Intel® Itanium® 2 
 Processor with up to 9 MB L3 cache, identified by the package S-Spec 
 numbers (see the Intel® Itanium® 2 Processor Identification and 
 Package Information table for details):

    * SL7SD and SL8CY
    * SL7ED and SL8CX
    * SL7EC and SL8CW
    * SL7EB and SL8CV
    * SL87H and SL8CU
    * SL7EF and SL8CZ 

 Intel® Server Platform SR870BH2 and Intel® Server Platform SR870BN4 
 fully supports mixing A1 and A2 stepping processors

   http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c01209579&jumpid=reg_R1002_USEN

 While HP ProLiant servers support mixed AMD Opteron processor 
 steppings within the same letter step, HP is recommending that the 
 processor with the lowest stepping be installed in the Boot Strap 
 Processor (BSP) slot and that the System ROM be updated to the latest 
 available version. For example, an AMD Opteron 800 with Stepping C0 
 can be mixed with an AMD Opteron 800 with Stepping CG .

So displaying a non-fatal 'info' message about it would in fact be 
rather wise. Nothing scary, but we'd like to be informed.

Thanks,

	Ingo
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