Re: [PATCH v2 07/19] OpenRISC: DMA

[Jonas Bonn]

On Tue, 2011-07-05 at 17:37 +0200, Arnd Bergmann wrote:
> This will result in having conflicting mappings, one with and another
> without caching, which a lot of CPU architectures don't like. Are you
> sure that you can handle this with or1k?
> 
> 	Arnd

Hi Arnd,
I put a bit more thought into what we actually need for DMA and came up
with the implementation in this patch.  This is a lot simpler than what
we had before, but it seems to fit nicely with the model that we have.

The jist of it is that allocation of coherent memory just needs to
return pages with the cache-inhibit bit set so we now:

i)   call __get_free_pages (via alloc_pages_exact)
ii)  set the CI bit on those pages
iii) flush the pages from cache

This should mean that we don't have any conflicting page table entries
for these pages anymore.

I'd appreciate if you could look over this implementation to make sure
I haven't missed anything fundamental.

Thanks,
Jonas

PS: Having a bit of an issue with git send-email and in a bit of a hurry
so I just pasted the patch into this mail... should be ok since it's
just for review anyway; just hoping the mail client doesn't mess up the
formatting.

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