Re: [PATCH 1/2] x86, ioapic: Reserve only 128 bytes for IOAPICs

[Cyrill Gorcunov]

On Thu, Aug 25, 2011 at 06:17:06PM -0600, Bjorn Helgaas wrote:
> On Thu, Aug 25, 2011 at 5:33 PM, Suresh Siddha
> <suresh.b.siddha@xxxxxxxxx> wrote:
> > On Thu, 2011-08-25 at 16:05 -0700, Bjorn Helgaas wrote:
> >> Previously we reserved 1024 bytes, but that's more space than the IOAPIC
> >> consumes, and it can cause conflicts with nearby devices.  The known
> >> requirement is 68 bytes (sizeof(struct io_apic)), and rounding up to a
> >> power-of-2 gives us 128.
> >>
> >
> > Bjorn, Given the info from Intel that most of its io-apic
> > implementations has registers up to 0xff offset (reserved), does
> > reserving just the 128 bytes for the io-apic cause any address conflicts
> > if the next 128 bytes are allocated (by the OS) for any other device.
> 
> If the OS allocated the next 128 bytes to another device, it sounds
> like it would cause a conflict on Intel boxes.  This must be an area
> that differs between vendors.  I haven't seen a spec that mentions 256
> bytes as the required minimum MMIO size for IOAPICs, and apparently
> the AMD IOAPIC decodes 240 bytes or fewer.
> 

Hi Bjorn,

the former idea (as far as I remember) of all this IO_APIC_SLOT_SIZE
was to be sure the io-apics are allocated with 1K step (which
is requirements for io-apics), but definitely it doesn't consume
that much space neither it decode the whole range.

Which means, I would prefer if we have (since we change IO_APIC_SLOT_SIZE
anyway) some additional check and WARN_ON in this code. Something like

 if (io-apic-base-address & 0x3ff)
   WARN_ON();

Hm? (also we have bad_ioapic() check, probably should put such test
there instead).

	Cyrill
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