Re: [PATCHv5] DMAEngine: Define interleaved transfer request api

[Barry Song]

Hi Jassi,

2011/10/13 Jassi Brar <jaswinder.singh@xxxxxxxxxx>:
> Define a new api that could be used for doing fancy data transfers
> like interleaved to contiguous copy and vice-versa.
> Traditional SG_list based transfers tend to be very inefficient in
> such cases as where the interleave and chunk are only a few bytes,
> which call for a very condensed api to convey pattern of the transfer.
> This api supports all 4 variants of scatter-gather and contiguous transfer.
>
> Of course, neither can this api help transfers that don't lend to DMA by
> nature, i.e, scattered tiny read/writes with no periodic pattern.
>
> Also since now we support SLAVE channels that might not provide
> device_prep_slave_sg callback but device_prep_interleaved_dma,
> remove the BUG_ON check.
>
> Signed-off-by: Jassi Brar <jaswinder.singh@xxxxxxxxxx>
> ---
>
> Dan,
> ÂAfter waiting for a reply from you/Alexandre a couple of days I am revising
> Âmy patch without adding a hook for RapidIO case for 2 reasons:
> Âa) I think the RapidIO requirement is served better by the concept of
> Â Â virtual channels, rather than hacking "struct dma_chan" to reach more
> Â Â than one device.
> Âb) If Alexandre comes up with something irresistible, we can always add
> Â Â the hook later.
>
> Changes since v4:
> 1) Dropped the 'frm_irq' member.
> 2) Renamed 'xfer_direction' to 'dma_transfer_direction'
>
> Changes since v3:
> 1) Added explicit type for source and destination.
>
> Changes since v2:
> 1) Added some notes to documentation.
> 2) Removed the BUG_ON check that expects every SLAVE channel to
> Â provide a prep_slave_sg, as we are now valid otherwise too.
> 3) Fixed the DMA_TX_TYPE_END offset - made it last element of enum.
> 4) Renamed prep_dma_genxfer to prep_interleaved_dma as Vinod wanted.
>
> Changes since v1:
> 1) Dropped the 'dma_transaction_type' member until we really
> Â merge another type into this api. Instead added special
> Â type for this api - DMA_GENXFER in dma_transaction_type.
> 2) Renamed 'xfer_template' to 'dmaxfer_template' inorder to
>
> ÂDocumentation/dmaengine.txt | Â Â8 ++++
> Âdrivers/dma/dmaengine.c   |  Â4 +-
> Âinclude/linux/dmaengine.h  |  82 +++++++++++++++++++++++++++++++++++++++++-
> Â3 files changed, 90 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/dmaengine.txt b/Documentation/dmaengine.txt
> index 94b7e0f..962a2d3 100644
> --- a/Documentation/dmaengine.txt
> +++ b/Documentation/dmaengine.txt
> @@ -75,6 +75,10 @@ The slave DMA usage consists of following steps:
>  Âslave_sg  Â- DMA a list of scatter gather buffers from/to a peripheral
> Â Âdma_cyclic Â- Perform a cyclic DMA operation from/to a peripheral till the
> Â Â Â Â Â Â Â Â Âoperation is explicitly stopped.
> + Â interleaved_dma - This is common to Slave as well as M2M clients. For slave
> + Â Â Â Â Â Â Â Âaddress of devices' fifo could be already known to the driver.
> + Â Â Â Â Â Â Â ÂVarious types of operations could be expressed by setting
> + Â Â Â Â Â Â Â Âappropriate values to the 'dmaxfer_template' members.
>
> Â ÂA non-NULL return of this transfer API represents a "descriptor" for
> Â Âthe given transaction.
> @@ -89,6 +93,10 @@ The slave DMA usage consists of following steps:
> Â Â Â Â Â Â Â Âstruct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
> Â Â Â Â Â Â Â Âsize_t period_len, enum dma_data_direction direction);
>
> + Â Â Â struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
> + Â Â Â Â Â Â Â struct dma_chan *chan, struct dmaxfer_template *xt,
> + Â Â Â Â Â Â Â unsigned long flags);
> +

what if i want a cyclic interleaved transfer? i think the cyclic
interleaved transfer is what i want for audio dma.

> Â ÂThe peripheral driver is expected to have mapped the scatterlist for
> Â Âthe DMA operation prior to calling device_prep_slave_sg, and must
> Â Âkeep the scatterlist mapped until the DMA operation has completed.
> diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
> index b48967b..a6c6051 100644
> --- a/drivers/dma/dmaengine.c
> +++ b/drivers/dma/dmaengine.c
> @@ -693,12 +693,12 @@ int dma_async_device_register(struct dma_device *device)
> Â Â Â Â Â Â Â Â!device->device_prep_dma_interrupt);
> Â Â Â ÂBUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&
> Â Â Â Â Â Â Â Â!device->device_prep_dma_sg);
> - Â Â Â BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
> - Â Â Â Â Â Â Â !device->device_prep_slave_sg);
> Â Â Â ÂBUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) &&
> Â Â Â Â Â Â Â Â!device->device_prep_dma_cyclic);
> Â Â Â ÂBUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
> Â Â Â Â Â Â Â Â!device->device_control);
> + Â Â Â BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) &&
> + Â Â Â Â Â Â Â !device->device_prep_interleaved_dma);
>
> Â Â Â ÂBUG_ON(!device->device_alloc_chan_resources);
> Â Â Â ÂBUG_ON(!device->device_free_chan_resources);
> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
> index 8fbf40e..ce8c40a 100644
> --- a/include/linux/dmaengine.h
> +++ b/include/linux/dmaengine.h
> @@ -71,11 +71,85 @@ enum dma_transaction_type {
> Â Â Â ÂDMA_ASYNC_TX,
> Â Â Â ÂDMA_SLAVE,
> Â Â Â ÂDMA_CYCLIC,
> + Â Â Â DMA_INTERLEAVE,
> +/* last transaction type for creation of the capabilities mask */
> + Â Â Â DMA_TX_TYPE_END,
> Â};
>
> -/* last transaction type for creation of the capabilities mask */
> -#define DMA_TX_TYPE_END (DMA_CYCLIC + 1)
> +enum dma_transfer_direction {
> + Â Â Â MEM_TO_MEM,
> + Â Â Â MEM_TO_DEV,
> + Â Â Â DEV_TO_MEM,
> + Â Â Â DEV_TO_DEV,
> +};

Vinod has sent this as a seperate patch.

> +
> +/**
> + * Interleaved Transfer Request
> + * ----------------------------
> + * A chunk is collection of contiguous bytes to be transfered.
> + * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
> + * ICGs may or maynot change between chunks.
> + * A FRAME is the smallest series of contiguous {chunk,icg} pairs,
> + * Âthat when repeated an integral number of times, specifies the transfer.
> + * A transfer template is specification of a Frame, the number of times
> + * Âit is to be repeated and other per-transfer attributes.
> + *
> + * Practically, a client driver would have ready a template for each
> + * Âtype of transfer it is going to need during its lifetime and
> + * Âset only 'src_start' and 'dst_start' before submitting the requests.
> + *
> + *
> + * Â| Â Â ÂFrame-1 Â Â Â Â| Â Â Â Frame-2 Â Â Â | ~ | Â Â Â Frame-'numf' Â|
> + * Â|====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...|
> + *
> + * Â Â== ÂChunk size
> + * Â Â... ICG
> + */
>
> +/**
> + * struct data_chunk - Element of scatter-gather list that makes a frame.
> + * @size: Number of bytes to read from source.
> + * Â Â Â size_dst := fn(op, size_src), so doesn't mean much for destination.
> + * @icg: Number of bytes to jump after last src/dst address of this
> + * Â Â Âchunk and before first src/dst address for next chunk.
> + * Â Â ÂIgnored for dst(assumed 0), if dst_inc is true and dst_sgl is false.
> + * Â Â ÂIgnored for src(assumed 0), if src_inc is true and src_sgl is false.
> + */
> +struct data_chunk {
> + Â Â Â size_t size;
> + Â Â Â size_t icg;
> +};
> +
> +/**
> + * struct dmaxfer_template - Template to convey DMAC the transfer pattern
> + * Â Â Âand attributes.
> + * @src_start: Bus address of source for the first chunk.
> + * @dst_start: Bus address of destination for the first chunk.
> + * @dir: Specifies the type of Source and Destination.
> + * @src_inc: If the source address increments after reading from it.
> + * @dst_inc: If the destination address increments after writing to it.
> + * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read).
> + * Â Â Â Â Â Â Otherwise, source is read contiguously (icg ignored).
> + * Â Â Â Â Â Â Ignored if src_inc is false.
> + * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write).
> + * Â Â Â Â Â Â Otherwise, destination is filled contiguously (icg ignored).
> + * Â Â Â Â Â Â Ignored if dst_inc is false.
> + * @numf: Number of frames in this template.
> + * @frame_size: Number of chunks in a frame i.e, size of sgl[].
> + * @sgl: Array of {chunk,icg} pairs that make up a frame.
> + */
> +struct dmaxfer_template {
> + Â Â Â dma_addr_t src_start;
> + Â Â Â dma_addr_t dst_start;
> + Â Â Â enum dma_transfer_direction dir;
> + Â Â Â bool src_inc;
> + Â Â Â bool dst_inc;
> + Â Â Â bool src_sgl;
> + Â Â Â bool dst_sgl;
> + Â Â Â size_t numf;
> + Â Â Â size_t frame_size;
> + Â Â Â struct data_chunk sgl[0];
> +};
>
> Â/**
> Â* enum dma_ctrl_flags - DMA flags to augment operation preparation,
> @@ -432,6 +506,7 @@ struct dma_tx_state {
> Â* @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
> Â* Â Â The function takes a buffer of size buf_len. The callback function will
> Â* Â Â be called after period_len bytes have been transferred.
> + * @device_prep_interleaved_dma: Transfer expression in a generic way.
> Â* @device_control: manipulate all pending operations on a channel, returns
> Â* Â Â zero or error code
> Â* @device_tx_status: poll for transaction completion, the optional
> @@ -496,6 +571,9 @@ struct dma_device {
> Â Â Â Âstruct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
> Â Â Â Â Â Â Â Âstruct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
> Â Â Â Â Â Â Â Âsize_t period_len, enum dma_data_direction direction);
> + Â Â Â struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
> + Â Â Â Â Â Â Â struct dma_chan *chan, struct dmaxfer_template *xt,
> + Â Â Â Â Â Â Â unsigned long flags);
> Â Â Â Âint (*device_control)(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
> Â Â Â Â Â Â Â Âunsigned long arg);
>
> --
> 1.7.4.1

-barry
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