I reviewed the register and the lowest 4 bits are the silicon revision (my hw reads 0x1) and the upper four bits should always be zero. I will update the patch to silently succeed as long a valid value is read, else print a error including that value and return -ENODEV.Unfortunately on this chip there aren't any identification orIt seems like a more useful implementation would be to have the driver
> constant test registers. The only register close is the
> JTAGVERNUM_REG and that's will change across silicon revisions.
read and display this revision number during boot, this will give you
the register readability check and also let us know the device revision
which might be useful for diagnostics.