Re: [PATCH 3/3] mtd/nand : workaround for Freescale FCM to supportlarge-page Nand chip

[Artem Bityutskiy]

On Thu, 2011-11-24 at 18:02 +0800, LiuShuo wrote:
> ä 2011å11æ24æ 16:16, Artem Bityutskiy åé:
> > On Thu, 2011-11-24 at 07:49 +0000, Li Yang-R58472 wrote:
> >>> Subject: Re: [PATCH 3/3] mtd/nand : workaround for Freescale FCM to support
> >>> large-page Nand chip
> >>>
> >>> On Thu, 2011-11-24 at 08:41 +0800, b35362@xxxxxxxxxxxxx wrote:
> >>>> +               /*
> >>>> +                * Freescale FCM controller has a 2K size limitation of buffer
> >>>> +                * RAM, so elbc_fcm_ctrl->buffer have to be used if writesize
> >>>> +                * of chip is greater than 2048.
> >>>> +                * We malloc a large enough buffer (maximum page size is
> >>> 16K).
> >>>> +                */
> >>>> +               elbc_fcm_ctrl->buffer = kmalloc(1024 * 16 + 1024,
> >>> GFP_KERNEL);
> >>>
> >>> Are there NANDs with 16KiB page size?
> >> We are not sure, but are there possibility that chip with 16K page will appear?  Or maybe we can add a MACRO for the maximum page size?
> > I do not know, but I know that allocating 32KiB of contiguous physical
> > RAM may cause unneeded memory pressure and even fail if the memory is
> > too fragmented. So I would not go for this unless this is necessary.
> What is your suggestion ? 8k is enough ?

Up to you, I do not have suggestions, just expressed a concern. I'd keep
the buffer smaller if possible. By the time 16KiB pages appear, your HW
may retire already :-)

-- 
Best Regards,
Artem Bityutskiy

Attachment: signature.asc
Description: This is a digitally signed message part