Re: Busy-waiting with interrupts disabled

[Steve Calfee]

On 12/12/11 14:12, Alan Stern wrote:
> How long is it okay to busy-wait with interrupts disabled?  Are there 
> any clear-cut guidelines?
> 
> My feeling is that for ordinary desktop use, 1-2 ms should be about the
> limit, but other people may feel differently.  (There's one spot in
> ehci-hcd where the delay can last up to 250 ms, which does seem rather
> excessive.  Fortunately it never takes that long unless the hardware is
> broken.)
> 

This is a very subjective issue, as to how much is too much. Keep in
mind that when we had 1 MIP computers a delay of 1 to 2 ms would "waste"
from 1000 to 2000 potential instructions. With 3 gighz processors, the
potential waste jumps to 3,000,000 to 6,000,000 instructions. I know
that clock speed does not equal mips and that most processors spend most
of their time waiting for memory, but still, the waste increases with
processor speed.

Regards, Steve
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