[PATCH 1/1] r8169.c correct MSIEnable register offset
From: Su Kang Yin
Date: Wed Dec 14 2011 - 02:14:02 EST
correct MSIEnable (bit 5) register to Config1 (offset 0x52) instead of
Config2 (offset 0x53)
Signed-off-by: Su Kang Yin <cantona@xxxxxxxxxxx>
---
drivers/net/ethernet/realtek/r8169.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c
b/drivers/net/ethernet/realtek/r8169.c
index 67bf078..451835c 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -3430,18 +3430,18 @@ static unsigned rtl_try_msi(struct pci_dev
*pdev, void __iomem *ioaddr,
const struct rtl_cfg_info *cfg)
{
unsigned msi = 0;
- u8 cfg2;
+ u8 cfg1;
- cfg2 = RTL_R8(Config2) & ~MSIEnable;
+ cfg1 = RTL_R8(Config1) & ~MSIEnable;
if (cfg->features & RTL_FEATURE_MSI) {
if (pci_enable_msi(pdev)) {
dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
} else {
- cfg2 |= MSIEnable;
+ cfg1 |= MSIEnable;
msi = RTL_FEATURE_MSI;
}
}
- RTL_W8(Config2, cfg2);
+ RTL_W8(Config1, cfg1);
return msi;
}
--
1.7.0.4
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