Re: Regulator enable/disable delay based on board design: How tohandle?

[Laxman Dewangan]

On Monday 13 February 2012 10:07 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Mon, Feb 13, 2012 at 02:48:18PM +0530, Laxman Dewangan wrote:
>
> > We observed that some of the rail enable/disable settling time
> > depends on the board design specially based on external capacitor
> > connected on
> > rails.  This is observed mainly on VBUS regulator rail where
> > difference on the capacitance value which is connected on rail makes
> > the on/off
> > time to vary.
> Usually this would be handled via regulator driver platform data as the
> regulator will typically be designed with particular external components
> in mind and (especially in the case of DCDC convertors) may need to be
> configured differently depending on the choice of passive components.
> Many regulators also have some software control for the ramp rate,
> mainly intended to limit inrush currents on system startup, which can be
> varied at runtime if desired.

Interesting, Many regulator driver is written like it just take the 
regulator_init_data as the platform data and does not leave any option 
to add any new platform parameters.
Not sure how can we add platform data without too much tempering on the 
existing user, but if we can add parameter of delay(settling time) in 
struct regulator_init_data then almost all driver can support such 
platform specific delay.

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