On 03/02/2012 01:29 PM, David Daney wrote:On 03/02/2012 11:07 AM, Grant Likely wrote:Those defines are what you need to work to get rid of.+static void __init octeon_irq_set_ciu_mapping(unsigned int irq,I really must be missing something.
+ unsigned int line,
+ unsigned int bit,
+ struct irq_domain *domain,
struct irq_chip *chip,
irq_flow_handler_t handler)
{
+ struct irq_data *irqd;
union octeon_ciu_chip_data cd;
irq_set_chip_and_handler(irq, chip, handler);
-
cd.l = 0;
cd.s.line = line;
cd.s.bit = bit;
irq_set_chip_data(irq, cd.p);
octeon_irq_ciu_to_irq[line][bit] = irq;
+
+ irqd = irq_get_irq_data(irq);
+ irqd->hwirq = line<< 6 | bit;
+ irqd->domain = domain;
irq_create_mapping is called by irq_create_of_mapping() which isI think the domain code will set these.It is my understanding that the domain code only does this for:
o irq_domain_add_legacy()
o irq_create_direct_mapping()
o irq_create_mapping()
We use none of those. So I do it here.
If there is a better way, I am open to suggestions.
in turn called by irq_of_parse_and-map(). irq_domain always
manages the hwirq and domain values. Driver code cannot manipulate
them manually.
Given:
1) I must have a mapping between hwirq and irq that I control so that
non-OF code using the OCTEON_IRQ_* constants continues to work.
2) irq_create_mapping() will allocate a random irq value if none isSo you should be using legacy domain if you need to maintain fixed hwirq
already assigned to the hwirq.
Therefore: To avoid having random irq values assigned, I must manually
assign them.
to linux irq numbers. "linear" is a bit confusing as it doesn't mean
linear 1:1 irq number assignment, but linear search.
Ultimately, for DT boot you should use of_irq_init to scan the dts, and
then create a linear domain for each interrupt controller node. You may
need to decide on linear vs. legacy at runtime based on having a DT node
pointer or not.