Re: [PATCH 2/4] lib: vsprintf: Optimize division by 10000

[George Spelvin]

Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> On Mon, Sep 24, 2012 at 3:56 PM, George Spelvin <linux@xxxxxxxxxxx> wrote:
>> SPARCv8 UMUL puts the high half of the 64-bit result into the Y
>> register, and SPARCv7 has a multiply-step instruction (MULScc) which
>> does likewise.
>
> Early SPARCs don't even have a multiply instruction.

Are you sure we're not talking about the same thing?  Early SPARCs didn't
have a *single* multiply instruction, but *did* have a multiply step
instruction, which can be iterated to produce a 32x32->64-bit multiply.

That's what I was referring to.  All multiplies were slow, but widening
multiply was no slower.

And SPARCv7 had no divide support at all, so that was *really* slow.

SPARClite added a divide step, but also added an integer multiply
instruction, so again widening multiply beat the pants off divide.
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