Re: [PATCH 1/1] perf, Add support for Xeon-Phi PMU

[Cyrill Gorcunov]

On Tue, Sep 25, 2012 at 02:01:26PM +0200, Peter Zijlstra wrote:
> On Tue, 2012-09-25 at 15:42 +0400, Cyrill Gorcunov wrote:
> 
> > Guys, letme re-read this whole mail thread first since I have no clue
> > what this remapping about ;)
> 
> x86_setup_perfctr() / set_ext_hw_attr() have special purposed 0 and -1
> config values to mean -ENOENT and -EINVAL resp.
> 
> This means neither config value can be a 'real' event. Now it turns out
> Xeon-Phi has an actual event 0, which is masked by these special case
> thingies.

So guys, if understand all things correctly it's supposed to use some
-1/-2 as initial @config value for unsupported events, right? Vince,
may not it be easier to use bit 19 as a flag of valid event and clear
it when you write to msr, thus we will not have to change "zero is reserved"
semantics (otoh i'm not sure if it won't become a problem somewhere in
future with some new cpu :)
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