Re: [PATCH 01/31] perf, x86: Add PEBSv2 record support

[Andi Kleen]

On Fri, Sep 28, 2012 at 10:43:04AM +0200, Peter Zijlstra wrote:
> On Thu, 2012-09-27 at 21:31 -0700, Andi Kleen wrote:
> > +               if (event->attr.precise_ip > 1 && x86_pmu.intel_cap.pebs_format < 2) {
> 
> Shouldn't that be: && x86_pmu.intel_cap.pebs_trap, like most other sites
> instead? Or didn't they flip the trap capability on Haswell?

In theory you're right, but trap wouldn't work for TSX aborts. Even if PEBS 
was a trap (it isn't) the trap would abort. Looking at the stack frame I
would get the wrong IP after the abort, not the abort event itself.

So to do the trap check would need to explicitely check for TSX abort
events too, which would be possible but fairly ugly.

If the flag ever changes could revisit this but I don't see it right
now. Also when available there's no good reason not to use EventingRip.

-andi
-- 
ak@xxxxxxxxxxxxxxx -- Speaking for myself only.
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