Take advantage of multiple MSIs implementation on x86 - on systems with
IRQ remapping AHCI ports not only get assigned separate MSI vectors -
but also separate IRQs. As result, interrupts generated by different
ports could be serviced on different CPUs rather than on a single one.
In cases when number of allocated MSIs is less than requested the Sharing
Last MSI mode does not get used, no matter implemented in hardware or not.
Instead, the driver assumes the advantage of multiple MSIs is negated and
falls back to the single MSI mode as if MRSM bit was set (some Intel chips
implement this strategy anyway - MRSM bit gets set even if the number of
allocated MSIs exceeds the number of implemented ports).
Signed-off-by: Alexander Gordeev <agordeev@xxxxxxxxxx>
---
drivers/ata/ahci.c | 91 ++++++++++++++++++++++++++++++++++++--
drivers/ata/ahci.h | 6 +++
drivers/ata/libahci.c | 118 ++++++++++++++++++++++++++++++++++++++++++++++---
3 files changed, 205 insertions(+), 10 deletions(-)