Re: [PATCH] pwm: dt: Fix description of second PWM cell

[Sascha Hauer]

On Mon, Oct 01, 2012 at 08:47:33AM +0200, Thierry Reding wrote:
> The second cell in the PWM specifier denotes the period in nanoseconds,
> not the duty cycle. The latter can be freely configured at runtime and
> a PWM with a fixed duty cycle would be rather pointless.
> 
> Signed-off-by: Thierry Reding <thierry.reding@xxxxxxxxxxxxxxxxx>
> Cc: Shawn Guo <shawn.guo@xxxxxxxxxx>
> Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> Cc: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
> Cc: "Benoît Thébaudeau" <benoit.thebaudeau@xxxxxxxxxxxx>
> Cc: Stephen Warren <swarren@xxxxxxxxxxxxx>

Acked-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>


> ---
>  Documentation/devicetree/bindings/pwm/imx-pwm.txt            | 2 +-
>  Documentation/devicetree/bindings/pwm/mxs-pwm.txt            | 2 +-
>  Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
> index 9b9b185..8522bfb 100644
> --- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt
> +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
> @@ -4,7 +4,7 @@ Required properties:
>  - compatible: should be "fsl,<soc>-pwm"
>  - reg: physical base address and length of the controller's registers
>  - #pwm-cells: should be 2.  The first cell specifies the per-chip index
> -  of the PWM to use and the second cell is the duty cycle in nanoseconds.
> +  of the PWM to use and the second cell is the period in nanoseconds.
>  - interrupts: The interrupt for the pwm controller
>  
>  Example:
> diff --git a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt
> index b16f4a5..d7946be6 100644
> --- a/Documentation/devicetree/bindings/pwm/mxs-pwm.txt
> +++ b/Documentation/devicetree/bindings/pwm/mxs-pwm.txt
> @@ -4,7 +4,7 @@ Required properties:
>  - compatible: should be "fsl,imx23-pwm"
>  - reg: physical base address and length of the controller's registers
>  - #pwm-cells: should be 2.  The first cell specifies the per-chip index
> -  of the PWM to use and the second cell is the duty cycle in nanoseconds.
> +  of the PWM to use and the second cell is the period in nanoseconds.
>  - fsl,pwm-number: the number of PWM devices
>  
>  Example:
> diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
> index bbbeedb..01438ec 100644
> --- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
> +++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
> @@ -7,7 +7,7 @@ Required properties:
>  - reg: physical base address and length of the controller's registers
>  - #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
>    first cell specifies the per-chip index of the PWM to use and the second
> -  cell is the duty cycle in nanoseconds.
> +  cell is the period in nanoseconds.
>  
>  Example:
>  
> -- 
> 1.7.12.2
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/