Re: [PATCH 1/3] pwm: lpc32xx - Fix the PWM polarity

[Alexandre Pereira da Silva]

On Wed, Nov 14, 2012 at 9:58 AM, Alban Bedel
<alban.bedel@xxxxxxxxxxxxxxxxx> wrote:
> The duty cycles value goes from 1 (99% HIGH) to 256 (0% HIGH) but it
> is stored modulo 256 in the register as it is only 8 bits wide.
>
> Signed-off-by: Alban Bedel <alban.bedel@xxxxxxxxxxxxxxxxx>

Acked-by: Alexandre Pereira da Silva <aletes.xgr@xxxxxxxxx>

> ---
>  drivers/pwm/pwm-lpc32xx.c |   17 ++++++++++++++++-
>  1 files changed, 16 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
> index adb87f0..03ec3ff 100644
> --- a/drivers/pwm/pwm-lpc32xx.c
> +++ b/drivers/pwm/pwm-lpc32xx.c
> @@ -49,9 +49,24 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
>                 c = 0; /* 0 set division by 256 */
>         period_cycles = c;
>
> +       /* The duty value is a follow:
> +        *
> +        *  DUTY     HIGH LEVEL
> +        *   1         99.9%
> +        *   25        90.0%
> +        *   128       50.0%
> +        *   220       10.0%
> +        *   255        0.1%
> +        *   0          0.0%
> +        *
> +        * In other word the in-register value is duty % 256 with duty
> +        * in the range 1-256.
> +        */
>         c = 256 * duty_ns;
>         do_div(c, period_ns);
> -       duty_cycles = c;
> +       if (c > 255)
> +               c = 255;
> +       duty_cycles = 256 - c;
>
>         writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles),
>                 lpc32xx->base + (pwm->hwpwm << 2));
> --
> 1.7.0.4
>
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