Re: [PATCH 2/2] New driver: Xillybus generic interface for FPGA(programmable logic)

[Greg KH]

On Tue, Dec 04, 2012 at 08:43:18PM +0000, Arnd Bergmann wrote:
> On Tuesday 04 December 2012, Eli Billauer wrote:
> > I'm currently writing some documentation which will cover the API and 
> > also help reading the code, I hope. It takes some time...
> > 
> > Until it's done, let's look at a usage example: Suppose that the FPGA's 
> > application is to receive a high-speed bitstream with time multiplexed 
> > data, demultiplex the bitstream into individual channel streams, and 
> > send each channel's data to the host. And let's say that there are 64 
> > channels in original bitstream. So the FPGA has now 64 independent 
> > sources of data.
> > 
> > For that purpose, the Xillybus IP core (on the FPGA) is configured to 
> > create 64 pipes for FPGA to host communication. The names of these pipes 
> > (say, "chan00", "chan01", ...) are also stored in the FPGA.
> > 
> > When the driver starts, it queries the FPGA for its Xillybus 
> > configuration, and creates 64 device nodes: /dev/xillybus_chan00, 
> > /dev/xillybus_chan01, ... /dev/xillybus_chan63.
> > 
> > If the user wants to dump the data in channel 43 into a file, it's just:
> > 
> > $ cat /dev/xillybus_chan43 > mydump.dat
> > 
> > I hope this clarified things a bit.
> > 
> > I can't see how the firmware interface would help here.
> 
> I think a lot of us (including Greg and me) were confused about
> the purpose of the driver, since you did not include much documentation.
> 
> The request_firmware interface would be useful for loading a model
> into the FPGA, but that doesn't seem to be what your driver is
> concerned with. It's also a bit confusing because it doesn't appear
> to be a "bus" in the Linux sense of being something that provides
> an abstract interface between hardware and kernel device drivers.

Yes, that's what I was confused about as well.  I'll wait for a new
patch with new documentation, before commenting further.

greg k-h
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