Hi Mugunthan,But i have the same silicon revision (PG2.0) in my EVM and I am not seeing any issues. Can you
On Jan 29, 2013, at 1:45 PM, Mugunthan V N wrote:
On 1/28/2013 6:41 PM, Pantelis Antoniou wrote:A beaglebone prototype with the new silicon version, with the ethernet errataFix interrupt storm on bone A4 cause by non-by-the-book interrupt handling.I have tested CPSW on AM335x EVM 1.5A with flood ping and i am not
While at it, added a non-NAPI mode (which is easier to debug), plus
some general fixes.
Signed-off-by: Pantelis Antoniou <panto@xxxxxxxxxxxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/net/cpsw.txt | 1 +
drivers/net/ethernet/ti/cpsw.c | 222 +++++++++++++++++++++----
drivers/net/ethernet/ti/davinci_cpdma.c | 4 +-
drivers/net/ethernet/ti/davinci_cpdma.h | 2 +-
include/linux/platform_data/cpsw.h | 1 +
5 files changed, 194 insertions(+), 36 deletions(-)
seeing any interrupt storm.
Can you provide more details on how to reproduce the issue.
fixed displays this. You can't trigger it on old silicon.
The TI people on the CC list can confirm.