On 03/08/2013 06:53 AM, Laxman Dewangan wrote:NVIDIA's Tegra114 SoCs have the matrix keyboard controller whichEarlier Tegra versions supported up to a 16x8 matrix. This feeds into
supports 11x8 type of matrix. The number of rows and columns
are configurable.
the following defines in the driver:
#define KBC_MAX_GPIO 24
#define KBC_MAX_ROW 16
#define KBC_MAX_COL 8
#define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL)
Given Tegra114 supports /fewer/ pins and rows than earlier chips, I
think that makes the HW technically incompatible, since GPIO IDs 19..23
are invalid in this HW but valid earlier.
Now in practice I suppose that with a correct DT keyboard map for a
Tegra114 device, those extra invalid GPIOs would never be referenced, so
this is a little nit-picky, but I still feel we should fix this.
So, I'd like to see the KBC driver updated to derive the values for all
the defines I listed above from the compatible value.
Re-stated: The rules for compatible are: Always include the exact HW
name, then optionally include any other HW names it's compatible with.