Re: [PATCH] x86, amd, mce: Prevent potential cpu-online oops
From: Steffen Persvold
Date: Tue Apr 09 2013 - 07:34:09 EST
On 4/9/2013 12:24 PM, Borislav Petkov wrote:
On Tue, Apr 09, 2013 at 11:45:44AM +0200, Steffen Persvold wrote:
Hmm, yes of course. This of course breaks on our slave servers when
the shared mechanism doesn't work properly (i.e NB not visible). Then
all cores gets individual kobjects and there can be discrepancies
between what the hardware is programmed to and what is reflected in
/sys on some cores..
Hold on, are you saying you have cores with an invisible NB? How does
that even work? Or is it only invisible to sw?
only invisible to the kernel because the multi-pci-domains isn't working
pre 3.9 on our architecture.
cheers,
Steffen
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