Re: [PATCH 0/5] perf: Add support for hardware breakpoint addressmasks

[Oleg Nesterov]

On 04/09, Jacob Shin wrote:
>
> The following patchset adds address masks to existing perf hardware
> breakpoint mechanism to allow trapping on an address range (currently
> only single address) on supported architectures.
>
> perf uapi is updated, x86 AMD implementation (for AMD Family 16h and
> beyond) is provided, and perf tool has been extended to do:
>
>   $ perf stat -e mem:0x1000:w:0xf a.out
>                               ^^^
>                               "don't care" bit mask
>
>   which will count writes to [0x1000 ~ 0x1010)

Please help me understand...

Assuming that cpu_has_bpext == T, suppose that

	bp_addr		= 0x1001;
	bp_bp_addr_mask	= 0xf;

Is it the same as 0x1000/0xf above?

IOW, what exactly this mask means? I guess, mem:ADDR:w:MASK
should trigger the trap if CPU writes to the addr and

	(addr & ~MASK) == (ADDR & ~MASK)

correct?

And does attr.bp_len "contribute" to the mask?

I mean, if bp_len == X86_BREAKPOINT_LEN_8, does this mean that
bp_bp_addr_mask and (bp_bp_addr_mask | 7) have the same effect?

Oleg.

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