Re: [PATCH v8 1/2] arm: introduce psci_smp_ops
From: Will Deacon
Date: Thu Apr 25 2013 - 06:45:38 EST
On Thu, Apr 25, 2013 at 11:12:54AM +0100, Stefano Stabellini wrote:
> On Thu, 25 Apr 2013, Will Deacon wrote:
> > > +/*
> > > + * cpu_suspend Suspend the execution on a CPU
> > > + * @state we don't currently describe affinity levels, so just pass 0.
> > > + * @entry_point the first instruction to be executed on return
> > > + * returns 0 success, < 0 on failure
> > > + *
> > > + * cpu_off Power down a CPU
> > > + * @state we don't currently describe affinity levels, so just pass 0.
> > > + * no return on successful call
> > > + *
> > > + * cpu_on Power up a CPU
> > > + * @cpuid cpuid of target CPU, as from MPIDR
> > > + * @entry_point the first instruction to be executed on return
> > > + * returns 0 success, < 0 on failure
> > > + *
> > > + * migrate Migrate the context to a different CPU
> > > + * @cpuid cpuid of target CPU, as from MPIDR
> > > + * returns 0 success, < 0 on failure
> > > + *
> > > + */
> >
> > Can you move these comments into psci-smp.c please? They're really specific
> > to the implementation there, and if we put them in a header we're lying to
> > ourselves about the parameters actually described by the PSCI specification.
>
> You have a good point about the PSCI spec.
>
> However from the Linux POV these comments should regard the functions
> exported by psci_operations, not the firmware interface, this is why I
> think it makes sense to keep them in psci.h.
> What we are saying is for example that psci_operations.cpu_on returns 0
> on success and < 0 on failure, and it takes a cpuid and an entry point
> as parameters. We are not saying anything about the firmware interface.
I disagree. You're explicitly stating that we pass the `cpuid of target CPU,
as from MPIDR'. That's simply not true -- the firmware could choose any
numbering scheme to identify the CPUs. For KVM and Xen, it *is* the mpidr,
which is why psci-smp.c works at all, but that's where the comment belongs,
not in this header file.
Will
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