RE: [RFC PATCH net-next 2/6] x86: bpf_jit_comp: supportBPF_S_ANC_SECCOMP_LD_W instruction

[Eric Dumazet]

On Fri, 2013-04-26 at 16:38 +0100, David Laight wrote:

> The call needs the displacement from the address of
> the instruction following the call.
> I can't imagine any way in which above can allow for the 5 byte
> 'mov imm32,%edi' instruction.
> 
> I'd have thought there would be an EMIT1_imm32().
> (I've written a lot of x86 asm in my days!)
> 

Thats the same. 

off32 is a 32bit quantity, or immediate 32 if you prefer.



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