Re: [PATCH] perf, x86: Add workaround for MEM_*_RETIRED errata BV98

[Ingo Molnar]

* Andi Kleen <andi@xxxxxxxxxxxxxx> wrote:

> Peter Zijlstra <peterz@xxxxxxxxxxxxx> writes:
> >
> > So you're saying that if two SMT siblings count the same MEM_*_RETIRED event
> > (on the same counter?) events can get accounted to the wrong sibling?
> 
> It can happen regardless of what event is enabled on the other counter.
> 
> > And when the other sibling doesn't have (the same counter?) enabled we
> > can loose events?
> 
> doesn't have any events enabled.
> 
> > This begs the question what happens when the sibling does have the (same?)
> > counter enabled but counting an all together different event; do we then still
> > 'loose' events from the one sibling and add then to the other counter?
> 
> Yes, that is what the patch fixes.
> 
> Of course only if you actually apply it, and not lose it as usual.

If your snide remark is referring to your pending Haswell patchset then 
you are dead wrong: the reason why they have not been picked up yet is not 
because they were ignored, but because they had to go through 11 review 
iterations already - still counting (!).

That is a huge amount of overhead on the maintainer side.

With such a negative track record you should not expect maintainers to 
fast-track your patches or trust your judgement too much - your patches 
are often sloppy, your changelogs incomplete or outright deceiving, your 
replies are often evasive and non-constructive.

Thanks,

	Ingo
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