Re: [PATCH 2/2] spi: omap2-mcspi: Add FIFO buffer support

[Illia Smyrnov]

On 06/05/2013 03:03 PM, Mark Brown wrote:
> On Wed, Jun 05, 2013 at 02:39:58PM +0300, Illia Smyrnov wrote:
>
> >   - The spi slave nodes can provide the following information which is used
> >     by the spi controller:
> >     - ti,spi-turbo-mode: Set turbo mode for this device.
> > +  - ti,spi-fifo-depth: Enable FIFO and set up buffer depth.
>
> Why is this defined for slaves?  Surely the size of the FIFO in the
> controller is a property of the controller not the slave?

According to OMAP TRM [1] the FIFO buffer can be used by only one 
channel at a time. If several channels are selected and several FIFO 
enable bit fields are set to 1, the controller forces the buffer not to 
be used.

If there are several slaves on the controller we must select which of 
slaves will use the FIFO for SPI transfers. Also, optimal FIFO size is 
heavily dependent of the SPI transfers length specific for certain slave.

> > +		bytes_per_word = (cs->word_len <= 8) ? 1 :
> > +				(cs->word_len <= 16) ? 2 :
> > +				/* cs->word_len <= 32 */ 4;
>
> This isn't legible.  Use a switch statement, or better yet just divide.
>
> > +		level = (t->len < mcspi->fifo_depth ? t->len :
> > +			mcspi->fifo_depth) - 1;
> > +
> > +		mcspi_write_reg(master, OMAP2_MCSPI_XFERLEVEL,
> > +			((wcnt << 16) | (level << (is_read ? 8 : 0))));
> > +
> > +		chconf |= is_read ? OMAP2_MCSPI_CHCONF_FFER :
> > +			OMAP2_MCSPI_CHCONF_FFET;
>
> Please avoid such extensive use of the ternery operator, it's not good
> for legibility.
> > +	} else {
> > +		mcspi->fifo_depth = 0;
> > +		chconf &= ~(is_read ? OMAP2_MCSPI_CHCONF_FFER :
> > +			OMAP2_MCSPI_CHCONF_FFET);
> > +	}
> > +
> > +	mcspi_write_chconf0(spi, chconf);
>
> We have a bunch of return statements further up the function in cases
> where the FIFO can't be used which means that if we're in FIFO mode then
> hit one of those we'll not disable FIFO mode as far as I can tell?

I will rework this in the next patch version.

[1]: http://www.ti.com/lit/ug/swpu235z/swpu235z.pdf
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