[PATCH v2 0/2] spi: omap2-mcspi: add FIFO buffer support

[Illia Smyrnov]

These patches introduce FIFO support for TI OMAP4/OMAP5 MCSPI controller.
Using FIFO unload the DMA and improve data throughput. On Blaze (OMAP 4460) 
ethernet throughput with MTU 1500 was increased:
* for TX from 6.9476 Mbps (FIFO disabled) to 7.7982 Mbps (FIFO enabled),
* for RX from 6.5120 Mbps (FIFO disabled) to 7.5461 Mbps (FIFO enabled).

The FIFO sanity test on OMAP5 Panda board also has been done. 

The FIFO could be enabled for MCSPI by "ti,spi-fifo-enabled" in DT. If enabled,
driver will calculate the largest possible FIFO buffer size taking into account
MCSPI FIFO constraints for each SPI transfer.

The MCSPI FIFO constraints are:
* FIFO depth size defined as a multiple of the SPI word length;
* transfer's data size is a multiple of FIFO depth;
* transfer's words count less or equal 65535.

Also FIFO buffer with 1 byte size is insignificant, so driver will setup FIFO if
calculated size is within the 2 to 64 bytes range.

--------------------
v2:
* driver calculate and setup optimal FIFO size for each SPI transfer;
* "ti,spi-fifo-enabled" parameter in MCSPI DT node to enable FIFO;
* no FIFO settings in SPI slaves nodes in DT;
* Matthias Brugger patch was excluded from patch set.

Illia Smyrnov (2):
  spi: omap2-mcspi: Move bytes per word calculation to the function
  spi: omap2-mcspi: Add FIFO buffer support

 Documentation/devicetree/bindings/spi/omap-spi.txt |    8 +
 drivers/spi/spi-omap2-mcspi.c                      |  173 +++++++++++++++++---
 2 files changed, 158 insertions(+), 23 deletions(-)

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