[RFC] Staging: imx-drm: Do not use fractional part of divider

[Alexander Shiyan]

Hello.

Analysis of driver imx-drm led me to believe that the use fractional part of the divider is not always a good idea.
For example, for a parallel display bus connected to LVDS converter chip (DS90C363), in this case the use of
fractional part, clock will unstable and the on-chip PLL is not working properly, or rather, does not work at all.

Let me give a specific example.
ipu_crtc_mode_set 0x36314752
imx-ipuv3 40000000.ipu: clk_di_round_rate: inrate: 133000000 div: 0x00000035 outrate: 40150928 wanted: 40000000
imx-ipuv3 40000000.ipu: clk_di_round_rate: inrate: 133000000 div: 0x00000035 outrate: 40150928 wanted: 40150928
imx-ipuv3 40000000.ipu: clk_di_set_rate: inrate: 133000000 desired: 40150928 div: 0x00000035

In this case the divider is 3.5, that result to clock is incorrect. See an attached oscillogram F0000TEK.jpg.

After a patch the clocks is OK. Patch just uncomment some FSL code.
imx-ipuv3 40000000.ipu: clk_di_round_rate: inrate: 133000000 div: 0x00000040 outrate: 33250000 wanted: 40000000
imx-ipuv3 40000000.ipu: clk_di_round_rate: inrate: 133000000 div: 0x00000040 outrate: 33250000 wanted: 33250000
imx-ipuv3 40000000.ipu: clk_di_set_rate: inrate: 133000000 desired: 33250000 div: 0x00000040

See an attached oscillogram F0001TEK.jpg.

So, I want to review this from developers and wait for comments.


diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-di.c b/drivers/staging/imx-drm/ipu-v3/ipu-di.c
index 19d777e..d424c22 100644
--- a/drivers/staging/imx-drm/ipu-v3/ipu-di.c
+++ b/drivers/staging/imx-drm/ipu-v3/ipu-di.c
@@ -154,22 +154,15 @@ static int ipu_di_clk_calc_div(unsigned long inrate, unsigned long outrate)
 
 	if (div < 0x10)
 		div = 0x10;
-
-#ifdef WTF_IS_THIS
-	/*
-	 * Freescale has this in their Kernel. It is neither clear what
-	 * it does nor why it does it
-	 */
-	if (div & 0x10)
-		div &= ~0x7;
 	else {
 		/* Round up divider if it gets us closer to desired pix clk */
-		if ((div & 0xC) == 0xC) {
+		if (div & 0x0f) {
 			div += 0x10;
-			div &= ~0xF;
+			/* Strip fractional part of divider */
+			div &= ~0x0f;
 		}
 	}
-#endif
+
 	return div;
 }
 
-- 
1.8.1.5

---

Attachment: F0001TEK.jpg
Description: JPEG image

Attachment: F0000TEK.jpg
Description: JPEG image