Re: [PATCH v2 1/2] mce: acpi/apei: Honour Firmware First for MCAbanks listed in APEI HEST CMC

[Borislav Petkov]

On Fri, Jun 21, 2013 at 03:02:04PM +0530, Naveen N. Rao wrote:
> As an example, consider a hypothetical single-core Intel processor
> with Hyperthreading. On init, let's say the first cpu ends up owning
> banks 1, 2, 3 and 4; and the second cpu ends up owning banks 1 and
> 2. This would mean that MC banks 1 and 2 are "hyperthread"-specific,
> while banks 3 and 4 are shared. Now, if we offline the first cpu, it
> disables CMCI on all 4 banks.
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

This is what I find strange - having to disable CMCI, especially on a
shared bank, just to reenable it right back on the next core. But I
guess this is a constraint dictated by the hardware...

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
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